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How does a statemachine work ?

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gauchosuizo

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Statemachine

hi

can explain me anybody how does work a statemachine? Maybe an example?

Thanks and aloha

Pablo

CCS, PIC18F252, WXP, MPLAB, ICD2
 

Re: Statemachine

Hi,

Here are some links to Mailey and Moore to finite state machines :

h**p://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Seq/fsm.html
h**p://www.cs.umd.edu/class/spring2003/cmsc311/Notes/Seq/impl.html

or software example :

h**p://www.conman.org/projects/essays/states.html

* = t
 

Re: Statemachine

State machine in verilog
---------------------------------------------------
always @(posedge CLK)
begin
STATE0 = next_STATE0;
STATE1 = next_STATE1;
STATE2 = next_STATE2;
STATE3 = next_STATE3;
STATE4 = next_STATE4;
end

always @ (RESET or STATE0 or STATE1 or STATE2 or STATE3 or STATE4)
begin

if ( STATE4 | RESET ) next_STATE0=1;
else next_STATE0=0;

if ( ~RESET & STATE0 ) next_STATE1=1;
else next_STATE1=0;

if ( ~RESET & STATE1 ) next_STATE2=1;
else next_STATE2=0;

if ( ~RESET & STATE2 ) next_STATE3=1;
else next_STATE3=0;

if ( ~RESET & STATE3 ) next_STATE4=1;
else next_STATE4=0;
end
 

Statemachine

You can search EDA books about digital design in EDA ebooks upload/download link or General Interest Ebook... link.
I recommend Digital Design by John Wakely:
 

Re: Statemachine

Finite State Machine for your reference. :wink: :x :lol: :( :oops:
 

Re: Statemachine

M looking for Software Which creates Circuit for Sequential State Machine

ny good Software for that ?
 

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