How do we judge if our Jitter and Eye diagram measurement/statistics are acceptable?

[kakiitek]

Hi all,
Needed some pointers.
Jitters - We have measured some LVDS clocks of around 2.5GHz and through the oscilloscope we are able to getting statistical measurement like these below -
Jitter (peak to peak) (ps)
Jitter (6 * delta) (ps)
N-cycle jitter
Cycle to Cycle Jitter
Question - How do we judge if the level is above what is acceptable respective to our circuits? Are there any articles or examples that will guide us on this?

Eye Diagram - There are many articles that say, the bigger the eye opening the better. But how shall we quantify the threshold of what is ok and what is not? I mean we could always define an eye mask and say there is an opening. And if the eye is not that well formed, we will just draw a smaller eye mask opening. But how shall we know if that is too small?

Appreciate if anyone could point me to any articles on these. Many thanks.

Best rgds,
kaki

 

[kaz1]

Hi all,
Needed some pointers.
Jitters - We have measured some LVDS clocks of around 2.5GHz and through the oscilloscope we are able to getting statistical measurement like these below -
Jitter (peak to peak) (ps)
Jitter (6 * delta) (ps)
N-cycle jitter
Cycle to Cycle Jitter
Question - How do we judge if the level is above what is acceptable respective to our circuits? Are there any articles or examples that will guide us on this?

Eye Diagram - There are many articles that say, the bigger the eye opening the better. But how shall we quantify the threshold of what is ok and what is not? I mean we could always define an eye mask and say there is an opening. And if the eye is not that well formed, we will just draw a smaller eye mask opening. But how shall we know if that is too small?

Appreciate if anyone could point me to any articles on these. Many thanks.

Best rgds,
kaki

Good questions. Though standards may define the limits but then how do standards get it. My assumption is that in a communication system what matters is passing the messages across so BER is the final judge. In a control system the convergence of feedback is the judge.
In some other systems sensitivity can be measured and works as guidance to final figures.

 

[dick_freebird]

The eye itself is only part of the story. Position of well formed
data -at the sampling clock edge- is where it's at. Your eye
display ought to be centered on that edge but the edge may
not be displayed. Clock recovery PLL, or a co-launched clock
that travels with data, must make that so.

There's statistics about how far from the clock edge you must
have "clear eye" to get such-and-such BER, I gather. And te
vertical separation must encompass the variation in comparator
(RX) input offset and low-overdrive delay (which rolls on as
amplitude & edge-rate compress).

In the end a BERT will give you an answer and you pass or fail.
Reasons will be back in the eye waveforms. But making one open
eye on the bench is different from ensuring consistently so in the
field. That's where you see stuff like equalization applied on
power-up, to "make so".