Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

how do we diffrentiate FPGA and CPLD

Status
Not open for further replies.
CPLD includes Large combinational parts and a few latches or flip-flops. In other word, if sequential part of your design is small, you'd better use CPLD.
But in FPGA, you will have lots of flipfliops and if number of flip-flops in your design is large, you'd better to use FPGA instead of CPLD.

RGDS,
KH
 

CPLD's route resource are all global resource , can garentee the delay , but have the resouce is limited

FPGA has two kinds of route resource, local and global.
 

CPLD - in most cases - has internal flash memory to burn it with your bin file while on the other hand for FPGAs - in most cases - you must have external memory...
 

CPLD vs. FPGA is very interesting!
 

FPGA has a big number of equivalent NAND gates ( which mesure de PLD complexity ) and much more routability
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top