How do these ESD protection circuits work ?

[yoon]

There are two ESD protection circuits.
How do these two circuits work?
What is the difference?
Please let me know

 

[BigBoss]

They are almost same..
First one uses the Capacitor between Bulk-Gate, second one uses an extra capacitor.
When ESD transient pulse appears, a current flows through the resistor and a voltage occurs between Gate-Source of NMOS transistors and this NMOS makes VDD-VSS short circuit in a temporary time slot.So protects the IC against ESD zapps.

 

[yoon]

Thank you for answer.
and I have another question.
I'm wondering what's the difference between with and without inverter.

 

[BigBoss]

Thank you for answer.
and I have another question.
I'm wondering what's the difference between with and without inverter.

First circuit protects the IC against negative ( less than GND potential) spikes, second one protects both.

 

[fanwei]

First circuit protects the IC against negative ( less than GND potential) spikes, second one protects both.

Isn't the first circuit protects the IC against positive？When positive pulse ouccrs，MOS's gate becomes high and NMOS turns on.

 

[KlausST]

Hi,

I see VDD and VSS. But where is the input and the output?
What is the signal that should be protected aganst ESD?

Klaus

 

[fanwei]

Hi,

I see VDD and VSS. But where is the input and the output?
What is the signal that should be protected aganst ESD?

Klaus

I guess VDD is the input.

 

[KlausST]

Hi,

Makes sense.
And VDD is the signal that should be protected against ESD. Only power supply. No other signal is involved.

Although I think that supplies are not that problematic with ESD (external circuitry, big capacitors, fast capacitors, other load..) it surely is possible.

So it protects against overvoltage ... and reverse voltage.

Does anyone expect voltages higher than 10V (just as example) at VDD? with and wihtout protection..

I´m asking because ESD usually is in the range of kilovolts.

Klaus