Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How could the min and max load cap of an inv can be found ?

Status
Not open for further replies.

muthamil

Member level 1
Joined
Feb 23, 2006
Messages
41
Helped
1
Reputation
10
Reaction score
0
Trophy points
1,286
Activity points
1,543
Hi ,

i am generating the Standard cell library(Synopsys Lib format) along with the standard cell design. I have to calculate the max_capacitance Attribute in the library.

The max_cap attribute defines the maximum total capacitive load that an outputpin can drive.

So i have calculate the Max load. Bottle neck is, if i increase the frequency or pulse width the Load changes.

My doubt is How to fix the speed of the circuit and calculate the Load Capacitance.

Thanks & Regards
Muthamil
 

Re: How could the min and max load cap of an inv can be foun

I never did it but it will be like..

First you have to fix transition limit on output signal say 1 ns
Then measure what load an output of a cell can drive keeping output transition and delay within limit.

I hope thi will help:cry:
 

    muthamil

    Points: 2
    Helpful Answer Positive Rating
Re: How could the min and max load cap of an inv can be foun

Hi,
If i understand you clearly. That fix the transition limit and vary the Load and
find the max capacitance for that specific transition.

I am doing in the same way as per above. but i need to know how to find both
max transition for max cap for specific cell at same time. As for my knowledge it
will change vise versa.

I need to know wt the companies are doing for this issue. Is there any formula or
some other techniques are there for this issue ....

Thanks & Regards
Muthamil
 

Re: How could the min and max load cap of an inv can be foun

While generating the .lib, the designer who is characterizing the circuit (say an inverter in your case) will have no idea about the frequency at which the circuit will be subjected to.

You can characterize the intrinsic behaviour of the circuit when it is subjected to a transition (at input) with a load at its output.

It sure is one of the important points to find out the max_transition and the max_load for your circuit. It is something that can only be found out 'accurately' using simulations. The reason why i say 'accurately' is because you do not want to put approximate info in the .lib since it will impact the overall timing flow at the top level.

I can give you a hint here. If you are using hspice (the industry standard), it maybe an easy process. Change one variable at a time, keep the other variable fixed. Find out the limiting value of changing variable. similarly, find out for the next variable. These will not be of course the final values. Now getting the final values should be easy.

Hope this helps!

PS:-Limiting value is the value at which the circuit fails to produce relaible output.

Cheers!!!
 
  • Like
Reactions: eric.pan

    muthamil

    Points: 2
    Helpful Answer Positive Rating

    eric.pan

    Points: 2
    Helpful Answer Positive Rating
Re: How could the min and max load cap of an inv can be foun

Dear Sir,
I can give you a hint here. If you are using hspice (the industry standard), it maybe an easy process. Change one variable at a time, keep the other variable fixed. Find out the limiting value of changing variable. similarly, find out for the next variable. These will not be of course the final values. Now getting the final values should be easy.

Yes sir you are correct i have to do as you told. so that only i can get the final values ...

Sir Could you explain me little bit clearly ...

Thanks & Regards

Muthamil
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top