How can we know what VDD is suitable for an application?

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Hi all,

I'm planning to design my digital controller using 65 nm CMOS process with standard VDD of 1.2V. But I'd like to make it lower, say 0.6V-0.8V.

What factors should I consider before I can decide what voltage to use? I'm thinking of the maximum speed required for the controller (in my case, it's about 10 MHz). Can anyone help me out?

Thanks.
 

You should to consider following:
- thresholds of NMOS and PMOS transistors
- maximum operating voltages of NMOS and PMOS transistors
- maximum operating frequency
- input and output logic levels (may be different from internal logic levels)
 

Thanks very much Gevy.
 

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