estradasphere
Member level 4
Cadence & Synopsys
Hi,
I'm a beginner in digital circuit design and have to design some digital circuits in Cadence to control my analog circuit. My question is, how can I synthesize my verilog program in Cadence, is CSI capable of synthesizing verilog codes? I found some tutorials about CSI (Cadence Synopsys Integration), I have the feeling that CSI can just do the opposite, that means, it can convert schematics into behaviorial models, or am I wrong? What about Verilog NC or XL? Can anyone recommend me a GOOD tutorial about synthesizing tools in Cadence and give me some advice about how to operate them?
thanks in advance
Hi,
I'm a beginner in digital circuit design and have to design some digital circuits in Cadence to control my analog circuit. My question is, how can I synthesize my verilog program in Cadence, is CSI capable of synthesizing verilog codes? I found some tutorials about CSI (Cadence Synopsys Integration), I have the feeling that CSI can just do the opposite, that means, it can convert schematics into behaviorial models, or am I wrong? What about Verilog NC or XL? Can anyone recommend me a GOOD tutorial about synthesizing tools in Cadence and give me some advice about how to operate them?
thanks in advance