bianchi77
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I got the answer but more mysteries to come....The answer is in the PCI specification. Sketch a basic PCI master signal waveform for read or write.
The capabilties to simulate PCI bus transactions in QSIM (Quartus integrated simulator) are rather limited, because you can only define fixed stimulation and have no means to interact with the device under test. But it can be still meaningful for a basic test.
For a full simulation, you have to refer to Modelsim and need to write a testbench. I guess, another unknown land to expplore.