How can I insert parameter in my Verilog core with NC-SIM?

[elektor]

Hi,

I using NCSIM v3.4 Linux
How can I insert parameter in my verilog core ( example : CLKPERIOD = 40 instead of 20 ) in elaborate process just like in vhdl core I can insert generic with the aid as option : ncelab (...) -generic CLKPERIOD=>40 ....

Regards

Elektor

 

[cactus_studio]

ncelab generics

Maybe you can use 'parameter' or 'defparam' to defind new parameter in your code body instead of using ncelab options.
An advantage of this method is you can change your parameter freely indepent of the programm you choosing, say ,NC-sim or modelsim or other.


cactus

 

[elektor]

ncelab parameter

Maybe you can use 'parameter' or 'defparam' to defind new parameter in your code body instead of using ncelab options.
An advantage of this method is you can change your parameter freely indepent of the programm you choosing, say ,NC-sim or modelsim or other.

cactus

Yes, but I have parameter in my code body. The problem is when I must change value this parameter without change my code... My tests use parameter PERIOD = 40 , but a few use PERIOD = 20 . In VHDL I use ncelab -generic PERIOD=20 and it is ok.. How I can do this in NCVerilog

Regards
Elektor