how can i find false path in design by design compiler?

[u24c02]

Hi?

I trying to find false and multi-cycle path in design by design compiler.

But i dont know how can i find false and multi cycle path in design by design compiler?

 

[rca]

well you did not find false path.
your synthesis has some timing issue, so two possibilities:
1- the designer claims this path is false, so you could add this path to false in your SDC.
2- the designer claims this path is true, then you have a timing issue, to solve by pipeline or rewrite RTL to push combinational logic before or after flops.

 

[u24c02]

Thanks.
Then how can designer know the designer's rtl design have false paths?
Even they have mistake and incorrect infomations.
How can make this issues?

 

[rca]

that's the job.
he must know how the design works.

 

[u24c02]

Ok thanks.

Then it seems to be definite the false path.
Actually, how many case exist the false path?
I am designer but i don't have memory what claim to synthesis designers.

 

[rca]

It is really design dependant, some design does not have any false-path, because everything is pipeline.
Normaly the synthesis does not request any false path, only to reach timing, that could help.