you can use 8 vpulse-sources,period of which is stepwise increasing. every vpulse-source begins low-level.By them you can gain 0000_0000 to 1111_1111.you can gain output of stepwise voltage. you can get DNL and INL.
You can calculate the best fit line equation according your output. From the best fit line you can find the Vlsb and offset.
INL and DNL can be calculated.
I hope it usefully .
You can add a 8bits ADC in front of DAC. The output of ADC is connected with the input of DAC. The input of ADC is a ramp signal. So you can measure INL and DNL.
Dear Analog_starter:
I have the same problem. I think that chenliy's
method is a good method and the ideal
comparator(8) can as the ideal ADC.
I hope that helps.
if an adc is added,you need to think about linearity of adc. So how many bits should be used. My prevenient means can get actual voltage. You can use an ideal 8bits dac,and you can get theoretic voltage. compare them and you can get DNL and INL.
Dear watersky and paladinzlp:
If I add the 10-bit ADC before the 8-bit DAC,
How to simulate the DNL and INL?
Expect verilog-A,how can I add the 10-bit
ADC?