I am trying to use ASITIC to analyze an inductor. However, in my 65nm substrate information, I cannot find the "Metal 0" as used in ASITIC.
In ASITIC document, it mentions that "Metal 0" exists in the epitaxial layer, but in my technlogy document, it does not mention about this metal in the epi layer. The metal structure starts from metal 1 above the epi layer.
How can I define the "Metal 0" in ASITIC ? In my tech file, I started the metal layer from Metal 1, and ASITIC reported an error that it cannot fine Metal 0.
Hi DoYouLinux,
I'm now using ASITIC to build inductor. And i encounter the same problem with you. I think your method (replace metal 1 with metal 0, metal 2 with metal 1 and so on) is not consistent with the author's intent. The metal0 mentioned by the author is embeded in epi layer, so i think it may be something we don't know. BTW, i can't find the thinkness of epi layer and substrate in my technology files. The process i used in SMIC 65 nm. How do you find them?