belax
Member level 2
fpga ata
Sorry for my English, i am from Russia.
I want to make a device , which has to encrypt data trough the IDE interface.
(I want to encrypt HDD).
My encrypter will have been done using ALTER.
But it is not a question.
I don't want to waste my time implemeting IDE/ATA interface (all PIO, DMA,...) on FPGA.
So, i am looking for ASIC or CORE for ALTER which has an opportunity for buffering data (HOST->HDD and HDD->HOST). I am going to encrypt that data (buffered) and then send to HDD (or to HOST, if data coms from HDD).
Encr. algorithm will be GOST 28147-89.
Please, help me. Give me an advise - how can i do it.
Thank you.
Sorry for my English, i am from Russia.
I want to make a device , which has to encrypt data trough the IDE interface.
(I want to encrypt HDD).
My encrypter will have been done using ALTER.
But it is not a question.
I don't want to waste my time implemeting IDE/ATA interface (all PIO, DMA,...) on FPGA.
So, i am looking for ASIC or CORE for ALTER which has an opportunity for buffering data (HOST->HDD and HDD->HOST). I am going to encrypt that data (buffered) and then send to HDD (or to HOST, if data coms from HDD).
Encr. algorithm will be GOST 28147-89.
Please, help me. Give me an advise - how can i do it.
Thank you.