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(HOST)ATA/IDE <-> MyDevice <-> ATA/IDE (HDD)

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belax

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fpga ata

Sorry for my English, i am from Russia.
I want to make a device , which has to encrypt data trough the IDE interface.
(I want to encrypt HDD).
My encrypter will have been done using ALTER.
But it is not a question.
I don't want to waste my time implemeting IDE/ATA interface (all PIO, DMA,...) on FPGA.
So, i am looking for ASIC or CORE for ALTER which has an opportunity for buffering data (HOST->HDD and HDD->HOST). I am going to encrypt that data (buffered) and then send to HDD (or to HOST, if data coms from HDD).
Encr. algorithm will be GOST 28147-89.

Please, help me. Give me an advise - how can i do it.
Thank you.
 

Re: (HOST)ATA/IDE <-> MyDevice <-> ATA/IDE (HDD

WELL ... well ,, what a SURPRISE ,,, i thought aboout doing this LONG TIME AGO (2 years) . I wanted to scramble the data lines with HARDWARE ,, but after some thought is more complicated because the first sector is FIXED so if you compare that sector to what you scramble then you can find the scrambling PATTERN ,,
so to work around it .Evry sector has to be scrambled differently ,,
Well is very easy(just some more work) . But i decided to abandon this project BECAUSE parallel IDE is DEAD !
The new hard drives have SERIAL ATA .. and the frequency is very high (3 gigabits) ...and you will have to buffer packages .. ... too COMPLEX !

But if you want to try the only architecture capable IS VIRTEX II or 4
 

Re: (HOST)ATA/IDE <-> MyDevice <-> ATA/IDE (HDD

Ok.
Yesterday i found a wonderful (on first view) processor.
MPC5200 from Freescale.
It has PCI and ATA-HOST interface.
Do you think , it will be more powerful device, if i will combine this processor with FPGA (FPGA only as crypto-processor).
So i am now issueing one question. Can i do HDD Crypto as PCI <-> (MPC5200 + FPGA) <-> ATA/IDE(HDD).

About "you can find the scrambling PATTERN" : I am going to use a set of keys, for about 256 keys (every key is 256bit long). So i think it will be a difficult task, to DeScrambling data.
Don't Forget that GOST has "Sync Parsel" (i don't know how it in English) and GOST says that you can get Sync Parsel as you wont.
Thank you.
 

Re: (HOST)ATA/IDE <-> MyDevice <-> ATA/IDE (HDD

Well it doesn't matters you have to crypt at least some sectors differently ,,
because if you do sector 0 the same as sector whateever .. Sector 0 contains the boot SCTRUCTURE and is FIXED .. so if you have the DATA and the CODED data IS EASY to know whatever DES scheme you are using ..
But it looks like you don't mind that the parallel IDE is DEAD .. in a couple of years all will be SERIAL ATA..
 

Re: (HOST)ATA/IDE <-> MyDevice <-> ATA/IDE (HDD

First: I agree with you that SATA will be the main interface in near future, BUT not in Russia. So i want to make a Parallel-ATA device.
So if i can make my device using MPC5200, i think, it will not be a problem to rebuild it in SATA interface.
Second: If you know First Sector and you can see the "Crypted FirstSector" that means nothing in GOST 28147-89 because in GOST you choose your own S-BOX (in DES the fixed). May be you will be able to know if i use a "simple gamma mode" or "gamma with back-link mode". But i am not going to use this device in FSB (former KGB) or other state-organizations. I want to do a dimploma-project in my institute (i am a student now). (Some extra info: In Russia FSB and other state-organizations are using the DOS OS, because they have a source-code and they know that DOS does't have a "black-box", so i don't think that they will prefer a SATA in DOS.)

So, i have a question : Do you know somethink that can help me with my device(Micoprocessors, ASICs, ...)? Please give me some advises, which components i have to use to get max performense and which way i have to choose (ATA <->MyDevice <-> ATA(HDD) OR PCI <-> MyDevice <-> ATA(HDD)).
Thank you.
 

serial ata to parellel ide interface converter board can solve parallel ide disappearing problem.
 

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