Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

High Speed PCB design:REQ

Status
Not open for further replies.

hatemius

Newbie level 4
Joined
Feb 12, 2006
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,344
Hello All, I have small Project and I need some help from you guys

My project is to design High speed PCB to connect CPU to couple of external memories.
If you were me how could you defines:

- PCB stackup (2,4,6,8 layers!!!).
- Trace design based on I/O driver!!! how!! what!!.
- PCB terminations for these signals: RESET, CLOCK, DATA BUS, and ADDRESS BUS!!! I though I only have CPU and memory there these signals come from!! DO I have clock in my board!!!! heeelp.
- address and data bus used 100MHz syn. bust SRAM.
- what is clock tree distribution!!!.
- do I need to add clock to my design (CPU + Memories + clock)!!!.
- how could I connected them (memories) to let the signalto arrive at the same time.!!!
-Is my circuit layout mow only CPU and memories connected with couple of trace lines!!.

I new for this design so any advise will help.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top