chanchg
Junior Member level 3

I have to design a fully-differential high speed comparator with following specs
1. CMIR 1.2V to 2.5V
2. Overdrive Voltage 0.3V
3. Propagation Delay of 0.6ns.
4. Less than 1ns rise and fall time when terminated with 300Ohm at 5V.
5. Input signal freq varies from Dc to 220Mhz
Process is 0.35u CMOS
Can any one suggest the topology and design method for above comparator?
Regards
1. CMIR 1.2V to 2.5V
2. Overdrive Voltage 0.3V
3. Propagation Delay of 0.6ns.
4. Less than 1ns rise and fall time when terminated with 300Ohm at 5V.
5. Input signal freq varies from Dc to 220Mhz
Process is 0.35u CMOS
Can any one suggest the topology and design method for above comparator?
Regards