High speed CMOS level shift design

[lassyy]

Hi

Any have he expirement or reference about a high speed(GHz) CMOS level shift from 1.8V to 3.3V. which can be used for DVI or LVDS transmitter?
Thanks

 

[electronrancher]

lvds is bipolar, isn't it? you need to change 3.3v-0v into a pair of signals that range -1.8 to 0 and 1.8 to 0, according to on/off. there are many cheap lvds transmitter/receiver ic if you need to do this on PC board.

If you are designing your own IC, let's consider 0.13um process for GHz. Vth will be about 0.3v, and Vdsat about 300mV for a minimum-size NMOS running about 10-20uA. Put PMOS current mirror on top, NMOS current mirror on bottom - cascode would be best so they don't wear out quickly at these high speeds.

Take input through a simple diff amp or source follower buffer. Then stack three diode connected NMOS between the current mirrors. Output from buffer (0-3.3v) gets connected to first rung of the ladder. Next rung will be same voltage minus Vt+Vdsat (-0.6v) so 0-2.7v. Second rung will be minus 2*(Vt-Vdsat) or 0-2.1v. Third rung will be 0-1.5v. Scale the devices a little bigger for smaller Vdsat and you can easily level-shift to any voltages you want.

For a cheap solution on PCB, you can probably do this with phillips discrete microwave BJT but I think it will be noisy. Try building level shifters out of 2n3904, and practice at MHz level first. Diode-connected BJT will shift down by about 0.7v of course. Stack a few to get a nice ladder.