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High side switch - minimize power dissipation.

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berger.h

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High side switch - minimalize power disipation.

Hello ,
I need relise high side swith who switch 25V on load about 20 Ohm, if voltage on tracked line exceeds 4V, voltage on this line is 0-40V.
Switch transistor mus have max size SOT-223
It was originally used low saturation PNP transistor any as picture A.

Power lost over Base NPN 4V 4*0,4mA=1,6mW, 40*4,8mA=192mW for 40V
Power lost over colector NPN 25V (10,7+1,23)*25=298mW
Power lost over colector PNP (25-24,91)*1,246=112mW
Overal max power lost 112+298+192=602mW

If use P-MOSFET NVF2955, picture B


Power lost over Base NPN 4V 4*0,595mA=2,4mW, 40*3,93mA=158mW for 40V
Power lost over colector NPN 25V 0,55*25=14mW
Power lost over colector MOSFET (25-24,8)*1,241=240mW
Overal max power lost 240+14+158=413mW

MOFET solution have 50% lower power lost

Qouestion
Count I correctly?
is it s an efficient solution?
has one or the other solution significantly disadvantages or risks? For example, losses in the transition state.

SW.png
 

KlausST

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Re: High side switch - minimalize power disipation.

Hi,

the calculations seem to be correct.

NDT546 has less R_DS_ON --> less power dissipation.

Klaus
 

lw1ecp

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Re: High side switch - minimalize power disipation.

About losses in the transitions: do you need to meet given rise and fall times? Maybe resistors to the MOS gate are too high. I think just reducing R9 from 30 to 10k will still give adequate Vgs to turn the transistor on, but its turnoff time will be reduced by speeding up Cgs discharge.
 

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Re: High side switch - minimalize power disipation.

Another idea: when your input is not zero, will it always be 40V or at least >35V? If this is the case, then you can simplify your circuit. Just one NMOS, drain to +25V, source to load, 10k resistor from input to gate, 10V zener gate-source.
 

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Re: High side switch - minimalize power disipation.

Hi,

10V zener gate-source.
If you use a zener across GS, then mind that some zeners may have a lot of capacitance...slowing down switching speed..increasing switching power loss.

Klaus
 
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berger.h

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Re: High side switch - minimalize power disipation.

when your input is not zero, will it always be 40V or at least >35V?
Not , input is 4.5-40V or less than 4V (usually 0) and this device must be on if 4.5-40V and off if <4V.

Otherwise I thank everyone for reminders
 

carpenter

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Re: High side switch - minimalize power disipation.

About losses in the transitions: do you need to meet given rise and fall times? Maybe resistors to the MOS gate are too high. I think just reducing R9 from 30 to 10k will still give adequate Vgs to turn the transistor on, but its turnoff time will be reduced by speeding up Cgs discharge.

You are generally right. NDT2955 have Output capacitance only 601pF and with 30k is charged and discharged in 40us. if resistor is redecen to 10k and 3k is switchng time around 10us
 
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