Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

High side mosfet driver blows up. help :)

arkadiusz.gibes

Newbie level 4
Joined
Oct 22, 2019
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
91
Hello everyone


I'm playing with some kind of 3 phase motor controller and i have issue with high side mosfet driver. My circuit seems to work well until HV voltage rail will be increased to some level.
When it reaches about 150V the high side drivers are blowing up. I made a tests with no inductive load and everything was working correctly. The tests that i made were with 240V DC on power rail. The desired working voltage is 200V. My high side driver is IR25604. It's just a simple driver without any cool features. The device is operating with 50kHz pwm. Does anyone could help me with analysis of this issue ? The interesting thing is that my mosfets are still alive after IR25604 gose down. In attachments you find schematics and board layout. I presume that issue may be because in bad bootstrap or filtering ? The motor type is 3f BLDC around 100W.

Best Regards
Arkadiusz
 

Attachments


FvM

Super Moderator
Staff member
Joined
Jan 22, 2008
Messages
46,791
Helped
13,893
Reputation
28,034
Reaction score
12,524
Trophy points
1,393
Location
Bochum, Germany
Activity points
273,052
How do you know that specifically the HS driver is "blowing"? Sure that the MOSFETs are still healthy? There are several possible circuit issues, too large bootstrap series resistor is one of it.
 

KlausST

Super Moderator
Staff member
Joined
Apr 17, 2014
Messages
17,306
Helped
3,917
Reputation
7,832
Reaction score
3,779
Trophy points
113
Activity points
114,861
Hi,

Short answer: no Ground plane - no reliable operation.

Keep on design rules and PCB layout recommendations.

Klaus
 

arkadiusz.gibes

Newbie level 4
Joined
Oct 22, 2019
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
91
High side mosfet driver blows up

I checked that there is no output from the high side output of the controller. After that i replaced controller IC and it worked again. In provious revision i had 100ohm of bootstrap resistor and result was exactly the same. However does it have any meaning ? I thought that this resistor has only effect on bootstrap diode, it may stress it with higher current? The current flows there only when bootstrap is charging. So it could give as a result not enought charge to drive the high side gates which probably would end with blowed mosfets or who know what else. As i said before i made test with non-inductive load (lightbulb), and all the voltages on the gates seemed to be fine to me. Mosfets were cold, circuit was swiching properly even with higher HV rail voltage.

How could i verify that ? I know that design is not best but maybe there is something that i could fix for fast to get it work. Actually there is small change that i already made. There is no ground return like on pcb trought r27, instead i just used thick piece of cable and it connects source of low side mosfet with positive of HV capacitor. I did it during assembly because i realized that i made high power ground loop around driver circuit. However it's fixed now, and the circuit still fails. Im not experienced with high power switching circuit so if you could give some more detailed advice i would be grateful.

Best Regards
Arkadiusz
 

KlausST

Super Moderator
Staff member
Joined
Apr 17, 2014
Messages
17,306
Helped
3,917
Reputation
7,832
Reaction score
3,779
Trophy points
113
Activity points
114,861
Hi,

Traces ... wires ... can not replace a Ground plane. I (and others) already discussed this here many times. Just do a search.

so if you could give some more detailed advice i would be grateful.
All I could do is repeat what the datasheets recommend and the application notes.
But if I'd do it ... it takes time for both of us and it will not be that complete and detailed.

Thus I recommend you work through them ... and for sure we will be there to help you with some details.

Klaus
 

arkadiusz.gibes

Newbie level 4
Joined
Oct 22, 2019
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
91
Hi,

Traces ... wires ... can not replace a Ground plane. I (and others) already discussed this here many times. Just do a search.


All I could do is repeat what the datasheets recommend and the application notes.
But if I'd do it ... it takes time for both of us and it will not be that complete and detailed.

Thus I recommend you work through them ... and for sure we will be there to help you with some details.

Klaus
Thanks, I made some modifications to my project according to your tips and informations that i found in some TI motor power stages design application.
I have few questions. First, is it correct way to split ground in the way that I did it? I have one small connection between power ground and logic ground. Another thing is, diodes D4, D5, D6 to which ground should they clamp to (diode is marked on the schematic)? I think it should be connected to power ground as it clamps spikes from power side.
Also if you could guide me if im doing something wrong. The design is not finished yet, there will be banch of optocouplers below the gate drivers. I hope it is better now, there is no more cables and wires :bang:



pcb1.png
pcb2.png
sch1.png

Best Regards
Arkadiusz
 

KlausST

Super Moderator
Staff member
Joined
Apr 17, 2014
Messages
17,306
Helped
3,917
Reputation
7,832
Reaction score
3,779
Trophy points
113
Activity points
114,861
Hi,

Please post a link to the document that describes this "splitting the ground".

I don't think it's a good idea.
The short, but high peak current you send the the gate ... needs an equally short way back to the driver. Your "long way back" makes the signal slow, high impedance caused by high series inductance, will cause ringing andvwill create high channel crosstalk.
The "way back" should in best case at the opposite side to the track "to the gate".

Klaus
 

arkadiusz.gibes

Newbie level 4
Joined
Oct 22, 2019
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
91
Hi,

Please post a link to the document that describes this "splitting the ground".

I don't think it's a good idea.

Klaus
http://www.ti.com/lit/an/slva959a/slva959a.pdf?ts=1590567131936 this is the link. Yeee i think you may be right. They have a bit different scenario with two different grounds on the chip. The power ground is connected directed to the power ground plane. I missed it. So i will include the switch driver to the power ground. Than splitted ground should be left for lower noise and low power devices, am i right ?


C25 needs 1uF 50V MLCC across it - right by the pins of the GD IC ...
Easy, schematic it's not updated yet in 100%. However my calculations shows that it doesn't need to be that big, so i left it to confirm it later.

Thanks
 

KlausST

Super Moderator
Staff member
Joined
Apr 17, 2014
Messages
17,306
Helped
3,917
Reputation
7,832
Reaction score
3,779
Trophy points
113
Activity points
114,861
Hi,

I missed to say: the current PCB layout is much better than before. But could be better.

I see no need for a split GND plane with your circuit. Split GND planes are good where noisy ground currents and sensitive analog signals are close.
Your schematic seems not to be complete: 1 phase vs three phases, current sense circuit (this may call for a split GND plane)

Mind: a signal is not only from A to B (i.e. from driver to Mosfet), but also the way back. It always is a loop. For all the noise problems you don't need to look for low frequency or DC paths, you need to look for the HF paths, where the peak currents flow.

Example: the loop for the high side gate drive:
* C25 (= source of energy)
* U9_Vb
* U9_Ho
* R15
* FET_gate
* FET_source
* R19
* C25 ...(loop closed)

Critical points:
* The closer the signal paths and their return paths, (= the smaller the area enclosed by the loop) the better the better the magnetic field will compensate itself the lower the inductance = the smaller the ringing, the less the sent out magnetic field (EMI).
* use low impedance resistors = low series inductance
* mind that at the Fet_source there is high load current, thus keep the common path (load current and gate drive current) small. Best is to use an extra trace for the gate drive loop directly from the FET_source_pin. (Kelvin wiring)
(To make it more obvious I even in the schematic connect R19 (if used) directly to pin3 of Q5)
* C25 needs to be low impedance. Ceramics is good. (No electrolytics)
(I see no need for 50V rating, because it will never see more than VCC. But it does not hurt)
****

All the loop impedance determines the loop current. Thus the gate current will be limited by the sum of (R15 + R19) ..plus the other impedances for sure. I just want to say that it's not only R15 that limits the gate current

Honestly I never used R19 in my power designs...and I don't see the benefit. Read corresponding application notes carefully.
R19 limits the gate current, introduces additional loop inductance...and also prevents the bootstrap capacitor to be charged fast.
I don't see this as benefit.

I never used R9, too. The peak current through the diode is very short (I like it to be short). Thus you need only a short time (where the bridge low_side is ON) for the capacitor to be safely charged. = high duty cycle.
Read corresponding application notes for details. Even relatively small diodes will be able to handle the short pulses. Read datasheets.

What is D6 used for?

Mind: special care needs to be taken on R21 to be low inductive..and it's whole path. Use kelvin wiring to the amplifier.

Klaus
 

Easy peasy

Advanced Member level 5
Joined
Aug 15, 2015
Messages
2,427
Helped
893
Reputation
1,786
Reaction score
881
Trophy points
113
Location
Melbourne
Activity points
13,767
R19 is very useful if the layout is too open and the centre of the totem pole goes below ground - this is not uncommon and generally blows up a lot of driver chips before the fault is found.

To match gate drive R the lower R, R16, should be 15 ohms

for early test you may want to raise the gate drive R's to 47 ohm so that RFI does not interfere with the control too much ...

- - - Updated - - -

D6 is used in conjunction with R19 to limit undervolt excursions damaging the gate driver IC ...
 

arkadiusz.gibes

Newbie level 4
Joined
Oct 22, 2019
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
91
Thanks for all useful tips. I made some changes to my design. Klaus, i did how you said, now my drivers are closer to the mosfets pins. About those resistors i would like to stay with them for now. Maybe in case when i wouldn't need them i could just repleace them with good quality low esl smd 0ohm ? I noticed that by r19 i can drasticly reduce undervoltage shots when low switch goes off - this is the thing that Easy peasy said about. BTW in my first revision, i had -6V undervoltage shots on VS with 60V power supply... That was crazy... Anyway now im facing with different problem. I decide to use INA181 as a low side current measurement amplifier. I will make differential measurement, with simple filtering with RC network on the output. The question is how should i provide power and grounds to this amplifier. I presume that i will need to split that ground somewhere below power stage, make a lower noise section, and get all power supply, gnd and reference voltage from there ? am i right ? I will have mcu also in that section with built in ADC converter. One more thing is i would like to keep optocupplers between power ground and logic ground. Its because i would like to make additional connector so i could connect development kit to it before i will assembly the mcu on board. (This is not production device).

This is what i do have now. I marked ina amplifier and its decupling caps on the picture. Those four unconnected tracks are vcc, gnd, ref and output. So should i just take them down to the lower noise section ? And feed this opamp from there ?
How about ground plane on top layer that surround the mosfets, should i keep it there or just cut out ? I just wonder if that will not introduce more noise to the ground plane through capacitive coupling as i have high voltage slopes underneath.


Zrzut ekranu z 2020-05-29 11-01-18.png


Thanks
Arkadiusz
 

KlausST

Super Moderator
Staff member
Joined
Apr 17, 2014
Messages
17,306
Helped
3,917
Reputation
7,832
Reaction score
3,779
Trophy points
113
Activity points
114,861
Hi,

I noticed that by r19 i can drasticly reduce undervoltage shots when low switch goes off - this is the thing that Easy peasy said about. BTW in my first revision, i had -6V undervoltage shots on VS with 60V power supply... That was crazy...
Tell me what´s the new undershot with the new PCB layout. I bet it´s much better now. (But do a reference measurement not to see false undershot)

****
Current measurement:
First you need to decide your target precision. This determines what technique you need.
And you need to determine if you want fast response for short circuit detection or slow for averaging. Define the ripple.

I usually use a solid GND plane, short kelvin wiring, Opamp with it´s reference via the kelvin_gnd_signal. --> Simple, cheap, Good quality signal. Small gain error because it´s not true differential amp (usually below 2%). RC decoupling of power supplies. About 8 devices.

Klaus
 

treez

Advanced Member level 5
Joined
Sep 22, 2008
Messages
7,510
Helped
547
Reputation
1,097
Reaction score
528
Trophy points
1,393
Location
cambridge
Activity points
75,543
I would have a zener for gate-source of the high side fet.....around 18v.....and not an TVS...and definetely not a bidi TVS

You can slow things down by increasing the low side series gate resistor.....(but obviously not so much that you get big switching loss) this also will make things easier on the high side circuit.

Also a 1n4148 diode at the high side gate drive output....to the "high side ground".....

- - - Updated - - -

Also be wary of routing switching node copper around the pcb........i would even try and keep it from widening out underneath the high/low side driver chip.

As above have told, the first commandment in SMPS layout is to keep the loop area of tracks carrying switching pulse currents as small in area as possible....so eg, have goes and returns hugging closely to each other as much as possible.
 

Toggle Sidebar

Part and Inventory Search


Welcome to EDABoard.com

Sponsor

Sponsor

Design Fast


×
Top