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Hi side gate drive for LLC?

24vtingle

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Hi,
The attached shows an LLC with a transformer gate drive.
It is utterly useless because when the LLC goes into burst mode, and there are no gate drive pulses,
then there is nothing to actually hold the FETs off. The FET gates are pretty much floating when in no load and not driven hard off
as they should be.
As such, would you agree that the only secure way to drive LLC FETs is to use a high side gate drive supply, and then to have
a gate drive IC in the hi side (eg UCC25017) and then use that to hold the hi side FET hard off in periods of no load.?

UCC 25717

(LTspice and PNG schem attached)

(my apologies in the sim many of the fast diodes somehow got swapped by LTspice to be slow diodes...i find this happens a lot)

In the "half hearted attempt at hi side supply"...you can actually see how some storage caps in the hi side drive actually ensure the PNP is held ON so that the GATE is hard off when there are no pulses....but the cap will eventually discharge so this isn't so useful....But it proves how the hi side fet needs hard holding off in no load when the fets aren't being switched. This is a Chinese cct and they don't put anything in unless its absolutle needed so it shows how it is true
that really a hi side supply is needed for hi side drive of LLC.
In LLC there is very little dead time so you need to get the FETs under control with a hard drive...not have them flapping in the wind
--- Updated ---

The attached also has an "LLC with hi side supply," showing the right way to do it.
 

Attachments

  • GDT for LLC.png
    GDT for LLC.png
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  • LLC with chosen gate drive transformer _2xGDT.zip
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  • Half hearted attempt at hi side supply.zip
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  • half hearted attempt at hi side supply.png
    half hearted attempt at hi side supply.png
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  • LLC with hi side supply gate drive.png
    LLC with hi side supply gate drive.png
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  • LLC with Hi Side Supply gate drive.zip
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there is nothing to actually hold the FETs off. The FET gates are pretty much floating when in no load and not driven hard off
as they should be.
I added current source I1 in gate node. Simulation shows
that I can inject 900mA before gate voltage reaches Vgsth and drain current starts to flow. 2N3906 is not suitable for this current, BC327-40 will be better
1746513412634.png
It is utterly useless because when the LLC goes into burst mode, and there are no gate drive pulses,
I stopped the pulses. Look what happened, gate drive transformer resonates with DC blocking capacitors. Gates are not floating. Voltage from transformer opens them.
1746517389256.png
 
i stopped the pulses. Look what happened, gate drive transformer resonates with DC blocking
Thanks yes, you are taking the argument further than i had intended to....yes you are right and its another problem of this gate drive trxfrmer method...we have a planned project for many years to do "gradual reduction of duty cycle" for these kind of drives so as to mitigate this problem, but we never get time for it.

2N3906 is not suitable for this current, BC327-40 will be better
Thanks, yes, thankyou for noticing my "lazy" inserts of components in LTspice....i was being a bit of a "slack-Harry", since the sim was more "demonstrative" than something we ever intend to take to the lab...and ayk, in a real circuit like this, we would use the "Zetex" range of PNP, that have very high gain at relatively high I(ce)

I added current source I1 in gate node. Simulation shows
that I can inject 900mA before gate voltage reaches Vgsth and drain current starts to flow.
Thanks yes thats a useful knowledge to bring out of it. Of course, ayk, in the real situation, there would be all the strays involved in this which would change things....ayk, the switching node there is smash-crashing up and down from 400V to 0V in nanoseconds and spurious turn on is a real issue with "slack-Harry" gate drive methods.
 
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With high dv/dt at the drain situation is worse but you can reduce R3. R3 is main reason why pull down resistance is quite high
1746527167021.png
With 10ns rise time gate voltage is below Vgsth.

You can try with this circuit (from slua618a.pdf) this does not require low impedance at transformer secondary
1746527383648.png
 
Thanks yes i see the point about reducing the Base resistor as you kindly discuss. It sounds a good way, but of course, means that the gate drive power supply is shipping significantly more current......though to be fair, yes, if i was to use this circuit, i would do this and put up with that extra current....but to be more honest, no, i would use the above shown gate drive with the flyback high side supply......the only issue then becomes one of what do you use to refer up the high side gate drive signal to the high side.....little pulse transformer, or digital isolator.....?

I like the digital isolator method, but the dv/dt rating of the better ones is good but we fear they may go obselete....and then we think maybe just use a gate drive "signal" transformer to provide the gate drive signal to the high side UCC25717 gate driver.

Ayk, the CMI (common mode immunity) of these signal referrers is critical to the gate drive application.
Take NCP5181 which has now gone obsolete....only 50V/ns

..The dv/dt rating of the referring cct is critical ayk.

LTspice and PNG of cct with low Rbase of the PNP attached.
 

Attachments

  • LLc  with Low RBase PNPN turn off.png
    LLc with Low RBase PNPN turn off.png
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  • LLC with chosen gate drive transformer _2xGDT _LOWRBase.zip
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Take NCP5181 which has now gine obsolete
There are hundreds of mosfet drivers on the market, and only a few popular pinouts. You can choose similar ICs before circuit goes in to production.
Thanks yes i see the point about reducing the Base resistor as you kindly discuss.
Maybe I went too far with this 22R, power loss will be significant.
 
Thanks, and the attached of course is THE perfect LLC gate drive. SiC antiparallel, Si series, Gate drive ICs on every FET, turn off diodes and bipolar signal transformer to take the drive signal up to hi side. Perfect, and for a 1kW SMPS, those gate drive components are a small price to pay for perfection.

You will never suffer spurious turn on of the "opposite" fet in the leg.
You will never suffer the time old LLC failure of reverse recovery
And as long as duty cycle doesnt suddenly go from say 100kHz to zero khz (which the control chip should not do anyways) then none of that gate drive LC ringing to give spurious turn on.

Perfection...do you have a better way?
LTspice and PNG attached.

Little bit of a pain that the Si series diodes and the SiC anti parallels will need heatsinking but there you go...just a TO220 with clipon.

Woops the LTspice has swapped the output diodes for Si's instead of UFs...my apologies.
 

Attachments

  • Perfect LLC gate drive.png
    Perfect LLC gate drive.png
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  • Perfect LLC gate drive.zip
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1746586919155.png

You would be better off with an NPN - PNP totem pole drive to the gate - you get current gain from the IC pin and guaranteed pull down to 0.8V

a 5k6 resistor from driver pin to gnd gives you plenty of turn off via the pnp.
--- Updated ---

Just further:
1746587141197.png

some one is forgetting the 6V zener action of Q1 above - B - E, so if you apply 15V via R3, you get 9V applied to the gate instantly - hence the spike in the image above, R3 should be 680E with 1n across it, delete the vert link, delete D3
 
Thanks,

Also, The perfect LLC gate drive of previously is now more enhanced with the RCD circuit to
quench leakage L spikes.

The Series diode with the NFET looks unusual...because it looks as if it would prevent the CDG
capacitor from discharging at switch on. However, this is not the case, the series diode itself actually
briefly develops a reverse voltage equivalent to the rail voltage at switch ON.
Surprisingly , there are no disadvantages to the series diode other than the dissipation in the diode, and the fact that its
an extra component, but releases you from the threat of failure.
 

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  • Perfect LLC gate drive_1.zip
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  • Perfect LLC gate drive_1.png
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these circuits are very dependent upon the coupling in the GD TX and hence leakage, for high quality GD Tx, much simpler and lower cost ckts exist that give good performance, turn off in < 40nS, hold-off at startup, neg gate drive ( 1 - 3 V ) - and gradual turn on that provides a little additional dead time.
 
Thanks, but are you speaking of ones which use these fancy infineon gate drive chips?.....they look great but the fear of obselesence keeps us away.
Or are you speaking of the AC one which as you say gives the neg turn off and still manages to have a turn-off PNP?

The attached shows the LLC solution with high side gate drive supply
and Bootstrap driver chips to refer the gate drive signal up to hi side.
(LTspice and PNG attached)
These bootstrap chips are so cheap it makes you wonder why they haven't
replaced the venerable gate drive transformer.
Though there are horror stories of neg txient voltage on Vs, as well as the CMTI
needing to be >50V/ns.
LS6399 looks good for the job.

2EDL05 looks nicer and promises good withstand of neg VS, but it could be an obselesence fear
 

Attachments

  • LLC bootstrap.png
    LLC bootstrap.png
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  • LLC bootstrap.zip
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