links104 said:it can be designed very easily
1)just make the truth table with 16 inputs and one output
2)apply the condition that output is only high when 5 inputs are high otherwise low
3)now implement that truthtable using gates
thats it
amitjagtap said:hi pnnavigator0915,
Adding all 16 bits for detection of 5 1's is ok.
but will require PISO shift register and clk to add 16 bits serially.
So the question is we should use only gates as mentioned or some sequential components can be used.
If sequentilal components can be used in design then
i have other solution which uses counters,latch and gates.
rufeng70 said:Yes you need to somehow use adder. But you do not need a complete adder to find the exact number of ones. Here is one possible solution:
1) first you need to construct a basic 2 bit adder, using an and gate and an xor gate as shown in the figure a) (Sorry the diagram is messy)
2) use the adder to construct your logic as shown in figure b). where each square is a basic adder. Notice that for the adders in the first stage (first column from left), the weight of each sum output (i.e. S output of the basic adder) is one, the weight of each carry output ( C output of the basic adder) is two. For the adders in the second stage, the weights are 2 and 4 respectively, and for the third stage, the weights are 4 and 8.
Since you only need to know if there are exactly five ones, you do not need to construct a full adder. So you stop at the third column, and you want to make sure all the wires of weight 8 are zero otherwise you can not get 5, right? So that is how figure b is achieved.
sarokrk said:ya well .it is a simple 16:1 mutiplexer.
rufeng70 said:Yes you need to somehow use adder. But you do not need a complete adder to find the exact number of ones. Here is one possible solution:
1) first you need to construct a basic 2 bit adder, using an and gate and an xor gate as shown in the figure a) (Sorry the diagram is messy)
2) use the adder to construct your logic as shown in figure b). where each square is a basic adder. Notice that for the adders in the first stage (first column from left), the weight of each sum output (i.e. S output of the basic adder) is one, the weight of each carry output ( C output of the basic adder) is two. For the adders in the second stage, the weights are 2 and 4 respectively, and for the third stage, the weights are 4 and 8.
Since you only need to know if there are exactly five ones, you do not need to construct a full adder. So you stop at the third column, and you want to make sure all the wires of weight 8 are zero otherwise you can not get 5, right? So that is how figure b is achieved.
#define MASK_01010101 (((unsigned int)(-1))/3)
#define MASK_00110011 (((unsigned int)(-1))/5)
#define MASK_00001111 (((unsigned int)(-1))/17)
int bitcount (unsigned int n)
{
n = (n & MASK_01010101) + ((n >> 1) & MASK_01010101) ;
n = (n & MASK_00110011) + ((n >> 2) & MASK_00110011) ;
n = (n & MASK_00001111) + ((n >> 4) & MASK_00001111) ;
return n % 255 ;
}
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