diemilio
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Hi everyone. I'm trying to generate a circuit layout but I'm not familiar with the tools in the synopsys package. I have a VHDL file with the circuit description and the technology file needed, what I need to know is what process should I follow to generate the layout for my circuit. What other files do I need, how do I generate them, how do I integrate the different files to achive my goal, etc.
The tools I have are Astro, Milkyway, JupiterXT, Hercules and Cosmos.
Thanks for your help,
diemilio.
The tools I have are Astro, Milkyway, JupiterXT, Hercules and Cosmos.
Thanks for your help,
diemilio.