Help with cascaded multilevel inverter

[SALAH2021]

I am trying to implement a cascaded 5-level inverter by hardware but the signal not as fine as in the picture, how to solve this issue and the expected problem that can cause this problem.? I used gate drive and F2879D microcontroller and I measure the pulses separately seems fine.

--- Updated Jun 18, 2021 ---

 

[Easy peasy]

What is the load in the sim ? [ really the more information you supply the better able the skilled people on this forum can give insightful answers - if you give little to no information - you may get the same in return ]

 

[BradtheRad]

Your circuit appears to be a cousin of the 5-level diode-clamped inverter. This is my simulation for comparison. Gating signals are generated via window comparators, analog fashion. Eight switches are used for simplicity. Typical waveforms are shown.

The diodes come into use especially with an inductive load. They act as freewheeling diodes, absorbing inductive spikes.

 

[SALAH2021]

What is the load in the sim ? [ really the more information you supply the better able the skilled people on this forum can give insightful answers - if you give little to no information - you may get the same in return ]

the load is a resistive load R
the VDC= 200v the problem not with simulation, the problem with hardware when I am firing the pulses to IGBT can not get 5 level as in simulation

 

[SALAH2021]

Your circuit appears to be a cousin of the 5-level diode-clamped inverter. This is my simulation for comparison. Gating signals are generated via window comparators, analog fashion. Eight switches are used for simplicity. Typical waveforms are shown.

The diodes come into use especially with an inductive load. They act as freewheeling diodes, absorbing inductive spikes.

View attachment 170268

no it is cascaded 5 level

 

[FvM]

Resistive load, which resistance? It doesn't seem plausible at first sight to achieve the shown waveform.

But there are many open questions. How is the floating power supply implemented? Are you sure that it doesn't involve parasitic capacitance loading the inverter output. You should also show the driving pattern and more circuit details.

 

[Easy peasy]

Just echoing FvM's statements - you have provided so little information that it is near impossible to make any sort of educated suggestion

 

[SALAH2021]

Just echoing FvM's statements - you have provided so little information that it is near impossible to make any sort of educated suggestion

thanks, could you please tell me what is missing?

 

[Easy peasy]

pretty much everything is missing

 

[SALAH2021]

pretty much everything is missing

ok, I will delete it.

 

[SALAH2021]

I am trying to a 5 level signal by using a cascaded multilevel inverter, I used 8 IGBT, in my simulation I got it by using 2 VDC 100+100 =200v and R load is 200 ohm. now I want to implement it on LAB and I did not find anyone to guide me and this the first time to do that and take much time to try it, I am using microcontroller F28379D from a Texas company.
also using gate driver to firing the pulses. I follow the pulses that I gave in the Simulink part I wiring the wire to each switch, I measured the pulses separately after the gate driver and seems right. these the pictures of the circuit diagram, simulation result, the pulses that firing to the switches on the oscilloscope and the result from the oscilloscope at LAB.

 

[Easy peasy]

is there a question here ?

 

[SALAH2021]

is there a question here ?

so here my question is what the expected problem may prevent me to get 5 levels with hardware as in the simulation part?

 

[FvM]

As asked previously, give a detailed description of the lab hardware setup. E.g. how are the isolated power supplies implemented?

 

[SALAH2021]

As asked previously, give a detailed description of the lab hardware setup. E.g. how are the isolated power supplies implemented?

The isolated Gate Driver that I used is Si8275GBD and feed it by 5V from the microcontroller and 12 v supply from the dc supply. My goal is just to get at the oscilloscope 5 level wave as in the simulation.

 

[BradtheRad]

* Question: Did you already have success making a simpler converter? 3 level? Square wave? These are the steps toward building a 5 level converter.

* When you put an N transistor at the positive supply rail, it needs to be biased at a higher voltage than the positive supply. When the transistor turns on, notice that you want the emitter terminal (more negative terminal) to go to supply voltage. It won't do so unless bias voltage is higher than supply voltage.

* You have two power supplies. Does each provide a proper current path, at each moment in the cycle?

 

[FvM]

The isolated Gate Driver that I used is Si8275GBD and feed it by 5V from the microcontroller and 12 v supply from the dc supply.

A first small piece of information. The question is also about 6-fold 12V gate driver supply and 2-fold DC bus supply. What kind of supply? What's the capacitance of each power supply against ground?

I tried to understand the wiring of gate drivers in your simulation circuit, but I'm unable to relate it to expected 5-level pattern. In my understanding, each of the 4 half bridges should be operated in a push-pull manner, either the upper or lower switch is closed without free-wheeling periods, except for a short dead-time.

 

[Easy peasy]

you have to have a COMPLETELY isolated supply for the gate driver side ( RHS ) of the IC FOR EACH separate switch you drive ...!

you cannot have common grounds for power for isolated gate drive - this is why transformers are used in GD power supplies to isolate the driving side ...

 

[Easy peasy]

the above is why a proper diagram of your test circuit - would help contributors on this forum to quickly zero in on the ills of your circuit ....