prcken
Advanced Member level 1

HI,
I am not sure if it's the right place to ask this question.
Could anyone help me to understand the block diagram that i attached below?

I got it from this link
I couldn't understand the "16,384 x 256 x 32" in the bank, seems 2^14 WLs, 2^8 BLs, but what does 32 mean? is that 32 sub array?
I think the key issue is i don't know how does I/O gating DM mask logic work, and how does the FIFO transfers 32-bit into 4-bit?
Can anybody help?
Thanks!
I am not sure if it's the right place to ask this question.
Could anyone help me to understand the block diagram that i attached below?

I got it from this link
I couldn't understand the "16,384 x 256 x 32" in the bank, seems 2^14 WLs, 2^8 BLs, but what does 32 mean? is that 32 sub array?
I think the key issue is i don't know how does I/O gating DM mask logic work, and how does the FIFO transfers 32-bit into 4-bit?
Can anybody help?
Thanks!