[SOLVED] help on Two Stage Op Amp

[romel_emperado]

hi, can someone guide me how to come up a good simulation base on my code? I don't really understand what is the actual graph of this code I made..

****Library file
.prot
.lib 'rf018.l' tt
.unprot

mn1 a vin- c gnd nch w=1.25u l=0.6u m=2
mn2 b vin+ c gnd nch w=1.25u l=0.6u m=2
mp3 a a vdd vdd pch w=1.25u l=0.6u m=4
mp4 b a vdd vdd pch w=1.25u l=0.6u m=4
mp6 vout b vdd vdd pch w=1.25u l=0.6u m=10
mn7 vout inr gnd gnd nch w=1.25u l=0.6u m=5
mn5 c inr gnd gnd nch w=1.25u l=0.6u m=4
mn10 inr inr gnd gnd nch w=1.25u l=0.6u m=4
mp8 nc gnd b vdd pch w=1.25u l=0.6u m=4

cc nc vout 1p
cL vout gnd 4pf

inr vin+ gnd 100uA

vin vin+ gnd dc 1.8 


.TRAN .01us 5us

**.print ac vdb(vout) vp(vout)
.print v(out)
.probe
.END

This is the current graph of that code.. I dont know if its correct..

 

[FvM]

It's a transisent simulation without an input signal. Consequently, the output is effectively nothing, respectively some numerical "noise".

You'll usually need a pulse voltage source connected to the amplifier input as simulation stimulus.

P.S.: And connect the negative input somehow. And add a vdd supply. You should review a printout of node voltages to check for a reasonable simulation setup.

 

[romel_emperado]

hi FVM,

It's a transisent simulation without an input signal. Consequently, the output is effectively nothing, respectively some numerical "noise".

You'll usually need a pulse voltage source connected to the amplifier input as simulation stimulus.

can you help me plugging this theory in my code? I understand it and I tried many attempts plugging input into my code but I got many outputs which is I don't know what is the correct one...

 

[FvM]

You at least need to

* supplement an input stimulus, e.g. 
vin vin+ gnd pulse (1.7 1.9 1u 10n 10n 2u)
* connect a supply voltage
vsupply vdd gnd dc 3.3 * don't know your intended supply voltage
* connect the negative input somehow
vbias vin- gnd dc 1.8

You are operating the amplifier in open loop, so the output will possibly saturate. But you should see a response.

 

[romel_emperado]

Hi FVM,

I think I got an output here is my code.. I will post the graph next..

****Library file
.prot
.lib 'rf018.l' tt
.unprot

mn1 a vin- c gnd nch w=1.25u l=0.6u m=2
mn2 b vin+ c gnd nch w=1.25u l=0.6u m=2
mp3 a a vdd vdd pch w=1.25u l=0.6u m=4
mp4 b a vdd vdd pch w=1.25u l=0.6u m=4
mp6 vout b vdd vdd pch w=1.25u l=0.6u m=10
mn7 vout inr gnd gnd nch w=1.25u l=0.6u m=5
mn5 c inr gnd gnd nch w=1.25u l=0.6u m=4
mn10 inr inr gnd gnd nch w=1.25u l=0.6u m=4
mp8 nc gnd b vdd pch w=1.25u l=0.6u m=4

cc nc vout 1p
cL vout gnd 4pf

inr vin+ gnd 100uA

**vin vin+ gnd dc 1.8 

* supplement an input stimulus, e.g. 
vinput vin+ gnd  pulse (1.7 1.9 1u 10n 10n 2u)

* connect a supply voltage
vsupply vdd gnd dc 1.8 * don't know your intended supply voltage

* connect the negative input somehow
vbias vin- gnd dc 1.8


.TRAN .01us 5us

.print ac vdb(vout) vp(vout)
**.print v(out)
.probe
.END

---------- Post added at 15:16 ---------- Previous post was at 15:11 ----------

Is it corrent my vin+ is the same of what I have seen in my Vout since our input is a pulse I can see pulse output too..

 

[FvM]

Printing ac results in transient analysis makes no sense.

I didn't check, if the circuit works at all. But you can display all node voltages, starting with the input stage and see, what's happening.

 

[romel_emperado]

HI FVM This is the output I got..

* supplement an input stimulus, e.g.
vinput vin+ gnd pulse (1.0 1.8 1u 10n 10n 1u)

 

[FvM]

I just noticed that your OP is effectively disabled, because the reference current is connected to the wrong node. Using the same names for sources and nodes is likely causing confusion. Please take care that in the Isource +node - node syntax, the current flows from +node to -node.

iref gnd inr 100uA

Also I'm not sure about the common voltage range of the OP. The bias voltage for vin- should be possibly lower. Or connect vin- to vout.

 

[romel_emperado]

I changed it but no changes happen... I will try to figure out why..

 

[FvM]

You can e.g. start with a node voltage and element current printout after the initial solution. This assumes of course, that you have an idea about expectable numbers.

 

[romel_emperado]

Im very confused how to output gain ang phase base on my code.. I dont have idea..

---------- Post added at 17:59 ---------- Previous post was at 17:54 ----------

I there any language rather than using this hspice thing? (I don't understand this) it's more convenient to write a code like C/C++ or java..

 

[FvM]

The SPICE language isn't very difficult, I think. But most people are using schematic entry these days. You can e.g. refer to free LTSpice, it's operation is imple and mostly self-explanatory. But you need to understand the basic analysis variants and how to use them. Gain and phase are referring to AC analysis. To perform an OP AC analysis, you have to assure that it's biased to it's linear operation range. In other words, the input DC voltage must be adjust in a way, that the output voltage is at about half supply voltage.

 

[romel_emperado]

but before that I have question.. in the first place I can't make my transistor saturate

 **** mosfets


 subckt                                                                    
 element  0:mn1      0:mn2      0:mp3      0:mp4      0:mp6      0:mn7     
 model    0:nch.6    0:nch.6    0:pch.2    0:pch.2    0:pch.3    0:nch.3   
 region       Linear     Linear     Cutoff     Cutoff     Cutoff     Cutoff
  id         0.         0.         0.         0.         0.         0.     
  ibs        0.         0.         0.         0.         0.         0.     
  ibd        0.         0.         0.         0.         0.         0.     
  vgs        1.0000     1.0000  -1.258e-25 -1.258e-25 -1.258e-25    0.     
  vds        0.         0.      -1.258e-25 -1.258e-25 -1.037e-25  6.098e-27
  vbs      1.596e-26  1.596e-26    0.         0.         0.         0.     
  vth      441.7815m  441.7815m -440.6253m -440.6253m -458.7893m  483.4310m
  vdsat    546.9805m  546.9805m  -39.7861m  -39.7861m  -40.1599m   48.5376m
  vod      558.2185m  558.2185m  440.6253m  440.6253m  458.7893m -483.4310m
  beta     603.3552u  603.3552u  364.2896u  364.2896u    3.7346m   21.1784m
  gam eff  489.6906m  489.6906m  474.0417m  474.0417m  497.9476m  511.7809m
  gm         0.         0.         0.         0.         0.         0.     
  gds      328.7946u  328.7946u   73.7739p   73.7739p  463.2845p    2.6160n
  gmb        0.         0.         0.         0.         0.         0.     
  cdtot    412.3923f  412.3923f   37.5165f   37.5165f   72.5236f   65.3962f
  cgtot    434.2865f  434.2865f  315.3773f  315.3773f  140.5260f  141.8799f
  cstot    393.4336f  393.4336f   37.5165f   37.5165f   72.5236f   65.3961f
  cbtot    130.2816f  130.2816f  356.5620f  356.5620f  219.9824f  199.3773f
  cgs      217.6108f  217.6108f    8.4693f    8.4693f   16.4004f   18.3263f
  cgd      224.7342f  224.7342f    8.4595f    8.4595f   16.3968f   18.3229f

---------- Post added at 01:27 ---------- Previous post was at 01:25 ----------

the three regions are zero when I look into .lis file

 element  0:mn1      0:mn2      0:mp3      0:mp4      0:mp6      0:mn7     
 model    0:nch.6    0:nch.6    0:pch.2    0:pch.2    0:pch.3    0:nch.3   
 region       Linear     Linear     Cutoff     Cutoff     Cutoff     Cutoff
  id         0.         0.         0.         0.         0.         0.     
  ibs        0.         0.         0.         0.         0.         0.     
  ibd        0.         0.         0.         0.         0.         0.

---------- Post added at 02:06 ---------- Previous post was at 01:27 ----------

You can e.g. refer to free LTSpice, it's operation is imple and mostly self-explanatory.

Is this a software or something?

 

[FvM]

There's zero Id current in the shown transistors. You have to trace the bais current from the start (the bias source).

In my opinion, the problem is about understanding how the amplifier works and which conditions (current, voltage) can be expected for each element. You can't hardly avoid it if you want to learn semiconductor circuits.

 

[romel_emperado]

Hi FVM,


I managed to complete all the current but still the transistors are in cut-off state

 **** mosfets


 subckt                                                                    
 element  0:mn1      0:mn2      0:mp3      0:mp4      0:mp6      0:mn7     
 model    0:nch.1    0:nch.1    0:pch.1    0:pch.1    0:pch.1    0:nch.1   
 region       Cutoff     Cutoff     Cutoff     Cutoff     Cutoff     Cutoff
  id         9.7260p    9.7284p  -14.6829p  -14.3489p  -27.2242p   19.2282p
  ibs      -63.1200a  -63.1200a  2.177e-27  2.122e-27  4.445e-27 -4.437e-27
  ibd      -93.8972a  -98.5662a   97.0416a   93.4603a  259.5994a   -3.6416f
  vgs      196.1695m  196.1695m  -70.0403m  -70.0403m  -59.1683m    0.     
  vds        1.0261     1.0370   -70.0403m  -59.1683m -333.6232m    1.4664 
  vbs     -703.8305m -703.8305m    0.         0.         0.         0.     
  vth      610.9404m  610.9375m -438.4653m -438.4678m -438.4060m  436.2262m
  vdsat     47.4857m   47.4857m  -39.7360m  -39.7360m  -39.7354m   46.6958m
  vod     -414.7709m -414.7680m  368.4251m  368.4275m  379.2377m -436.2262m
  beta     715.9535u  715.9542u  305.5628u  305.5625u  763.9277u    1.8383m
  gam eff  476.8957m  476.8957m  471.5251m  471.5251m  471.5251m  486.3484m
  gm       325.5406p  325.6211p  467.0246p  456.3985p  867.0365p  614.0807p
  gds      221.5529f  221.6212f   23.2738p   39.9353p  680.4745f  429.1181f
  gmb       75.5276p   75.5460p  162.3692p  158.7227p  302.2657p  195.4948p
  cdtot     19.6942f   19.6754f   57.2885f   57.4891f  133.0696f   50.4751f
  cgtot    309.6570f  309.6570f  853.7838f  853.7839f    2.1457p    1.0774p
  cstot     22.2697f   22.2697f   58.6554f   58.6554f  146.6260f   66.0396f
  cbtot    322.3067f  322.2879f  917.2468f  917.4472f    2.2942p    1.1206p
  cgs        7.3366f    7.3366f   13.1469f   13.1469f   32.8579f   18.3501f
  cgd        7.3256f    7.3256f   13.1071f   13.1072f   32.7672f   18.3140f

****Library file


.GLOBAL vdd gnd

vdd vdd gnd 1.8v
vin+ in+ gnd 0.9v ac 0v
vin- in- gnd 0.9v ac 1v


mn1 a in- c gnd nch w=10u l=10u m=2
mn2 b in+ c gnd nch w=10u l=10u m=2

mp3 a a vdd vdd pch w=10u l=10u m=4
mp4 b a vdd vdd pch w=10u l=10u m=4

mp6 vout b vdd vdd pch w=10u l=10u m=10
mn7 vout inr gnd gnd nch w=10u l=10u m=5

mn5 c inr gnd gnd nch w=10u l=10u m=4
mn10 inr inr gnd gnd nch w=10u l=10u m=4

mp8 nc gnd b vdd pch w=10u l=10u m=4

cc nc vout 2p
cL vout gnd 10p


.dc vin+ 0v 1.8v 0.001
.dc vin- 0v 1.8v 0.001
.ac dec 10 10 10000MEG
.PRINT VDB(OUT) vdb(b)
.pz v(vout) vin-




.OP
.prot
.lib 'rf018.l' tt
.unprot


.END

---------- Post added at 03:38 ---------- Previous post was at 03:19 ----------

I don't understand.. hehe

 

[romel_emperado]

weeeehh! it is now saturated....

subckt
element 0:mn1 0:mn2 0:mp3 0:mp4 0:mp6 0:mn7
model 0:nch.7 0:nch.7 0ch.3 0ch.3 0ch.3 0:nch.3
region Saturati Saturati Saturati Saturati Saturati Saturati
id 16.3634u 16.3634u -16.3634u -16.3634u -100.3136u 100.3136u
ibs -16.3600a -16.3600a 2.373e-21 2.373e-21 1.414e-20 -1.635e-20
ibd -118.9448f -118.9477f 28.5503a 28.5503a 43.5577f -1.6820f
vgs 666.5267m 666.5267m -661.3199m -661.3199m -661.3191m 579.3509m
vds 805.2068m 805.2077m -661.3199m -661.3191m -1.1621 637.9480m
vbs -333.4733m -333.4733m 0. 0. 0. 0.
vth 571.2001m 571.2001m -458.6376m -458.6376m -458.5222m 483.2853m
vdsat 145.8397m 145.8397m -197.1059m -197.1059m -197.1910m 144.6332m
vod 95.3267m 95.3267m -202.6823m -202.6823m -202.7969m 96.0656m
beta 2.0315m 2.0315m 786.6896u 786.6896u 4.7238m 12.5417m
gam eff 514.4371m 514.4371m 497.9475m 497.9475m 497.9475m 511.7809m
gm 210.0875u 210.0875u 136.1976u 136.1976u 831.1747u 1.2800m
gds 759.7002n 759.6999n 779.8758n 779.8764n 3.8068u 5.1897u
gmb 51.6506u 51.6506u 44.9721u 44.9721u 274.5101u 365.6218u
cdtot 5.3057f 5.3057f 13.6929f 13.6929f 74.7989f 33.5716f
cgtot 29.8309f 29.8309f 74.0572f 74.0572f 443.9989f 179.6008f
cstot 34.7983f 34.7983f 89.9642f 89.9642f 539.3131f 216.3502f
cbtot 16.1871f 16.1871f 44.3004f 44.3004f 257.3724f 109.9778f
cgs 25.1562f 25.1562f 66.6724f 66.6724f 400.1557f 148.6861f
cgd 1.8286f 1.8286f 3.6207f 3.6207f 21.6053f 11.0050f

****Library file


.GLOBAL vdd gnd
vdd vdd gnd 1.8v



mn1 a in- c gnd nch w=5u l=1u 
mn2 b in+ c gnd nch w=5u l=1u 

mp3 a a vdd vdd pch w=11u l=1u 
mp4 b a vdd vdd pch w=11u l=1u 

mp6 vout b vdd vdd pch w=66u l=1u 
mn7 vout inr gnd gnd nch w=30u l=1u 

mn5 c inr gnd gnd nch w=10u l=1u 
mn10 inr inr gnd gnd nch w=30u l=1u 

mp8 nc gnd b vdd pch w=36.8u l=1u 

cc nc vout 2p
cL vout gnd 10p


iref vq inr 100uA


* supplement an input stimulus, e.g. 
vin vin+ gnd pulse (1.7 1.9 1u 10n 10n 2u)




vin+ in+ gnd dc 1v ac 1v
vin- in- gnd dc 1v ac 0v
.ac dec 10 100 100000MEG
.print vdb(out)


v1 vp vd 0v
v3 vp gnd 1.8v
v4 vq gnd 1.8v

.dc v3 0 1.8 0.1
.dc vin+ 0v 1.8v 0.001
.dc vin- 0v 1.8v 0.001



.OP
.prot
.lib 'rf018.l' tt
.unprot


.END

I don't know but I just added this thing .. hehe

v1 vp vd 0v
v3 vp gnd 1.8v
v4 vq gnd 1.8v

 

[romel_emperado]

This problem is solve now...

I got now the gain and the phase.. Thanks so much

here is the code

*Library file


.GLOBAL vdd gnd
vdd vdd gnd 1.8v



mn1 a in- c gnd nch w=5u l=1u
mn2 b in+ c gnd nch w=5u l=1u

mp3 a a vdd vdd pch w=11u l=1u
mp4 b a vdd vdd pch w=11u l=1u

mp6 vout b vdd vdd pch w=66u l=1u
mn7 vout inr gnd gnd nch w=30u l=1u

mn5 c inr gnd gnd nch w=10u l=1u
mn10 inr inr gnd gnd nch w=30u l=1u

mp8 nc gnd b vdd pch w=36.8u l=1u m = 5

cc nc vout 8p
cL vout gnd 10p


iref vq inr 100uA


.
vin vin+ gnd pulse (1.7 1.9 1u 10n 10n 2u)




vin+ in+ gnd dc 1v ac 1v
vin- in- gnd dc 1v ac 0v
.ac dec 10 100 100000MEG
.print vdb(out)


v1 vp vd 0v
v3 vp gnd 1.8v
v4 vq gnd 1.8v

*.dc v3 0 1.8 0.1
*.dc vin+ 0v 1.8v 0.001
*.dc vin- 0v 1.8v 0.001



.OP
.prot
.lib 'rf018.l' tt
.unprot

.option post
.print vdb(vout)

.END