proton
Member level 3
help on plx pci design
Hi friends,
I need the precious help of some expert of the plx pci chip.
I've bought the 9056 demo board, and I need an application which does
two things:
1) receives a bunch of data , randomly. that comes from a 24 bit bus, 30 Mhz and are validated by a data strobe signal
2) Send a bunch of data in the same manner.
It will be used to test a vme board, sending vectors to it and receiving
back the result.
How should it be done from the point of view of the plx ?
I think that it has to be a target when I send the data, but probably a dma
master when data are received... or not ?
Does someone has a piece of verilog or vhdl that I could use to understand how to program the fpga connected to the plx local bus ?
Eventually every example of hdl code used with a plx would be very
useful for me. I agree that plx chip are nice and easy to use, but the
documentation and the examples that they furnish in the rdk-lite
are really light ...
thx
proton
Hi friends,
I need the precious help of some expert of the plx pci chip.
I've bought the 9056 demo board, and I need an application which does
two things:
1) receives a bunch of data , randomly. that comes from a 24 bit bus, 30 Mhz and are validated by a data strobe signal
2) Send a bunch of data in the same manner.
It will be used to test a vme board, sending vectors to it and receiving
back the result.
How should it be done from the point of view of the plx ?
I think that it has to be a target when I send the data, but probably a dma
master when data are received... or not ?
Does someone has a piece of verilog or vhdl that I could use to understand how to program the fpga connected to the plx local bus ?
Eventually every example of hdl code used with a plx would be very
useful for me. I agree that plx chip are nice and easy to use, but the
documentation and the examples that they furnish in the rdk-lite
are really light ...
thx
proton