Help on Low power memory design

[ananish]

Hi friends,
i am doing a project on low power memory design using Tanner EDA tool. if anybody is there doing project in the similiar field or working in this field please reply so that we can share our ideas .

 

[kgeorge123]

Low power memory design is a very advanced concept.It varies depedning on what type of memory you want to design.Is it SRAm or EPROM or DRAM??
Low power involves proper frequency of operation.Efficient recharge cycle and Controlling various variations (Charge and discharge)happening across the bitlines.
There are several architechtural schemes utilize to acheive this.Memory Design by Kiyo Itoh is the best book for this.

 

[ananish]

MY PROJECT IS ON THE LOW POWER DESIGN OF SRAM. FOR PROPER FUNCTIONING OF THE SRAM WE HAVE TO ADJUST THE SIZE OF THE TRANSISTORS. MY MAIN DOUBT IS

1. IS IT ENOUGH TO ADJUST THE WIDTH IN THE MODEL FILE ITSELF THAT WE R CURRENTLY USING FOR ALL OTHER TRANSISTORS.

2. OR WHETHER WE HAVE TO USE A DIFFERENT MODEL HAVING THE REQUIRED WIDTH .

3. IS THERE ANY OTHER PARAMETERS THAT HAS TO BE CHANGED ALONG WITH THE WIDTH.



MY PROJECT MAINLY CONCENTRATES ON THE LEAKAGE REDUCTION IN SRAM.PLEASE CLEAR MY CONFUSIONS.THANKS IN ADVANCE.