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connected to the Xilinx Spartan 2. I tried several projects including the
ones from Opencores, Xilinx, Altera and others I can't remember (all for
free) and none of them worked. I bumped into the design made by XESS
by Dave Van Den Bout:
which worked very well, but it uses the SDRAM in "bursts of one"
address. Unfortunately, using a simple calculator, I figured that this
wouldn't be enough to generate simple VGA video with a clock rate of
50MHz, so I decided to write my own VHDL code that knows only how
to access the memory in busts of eight locations. I am still testing it
and it has a few bugs, but it appears to be working almost OK.
I suggest you check out Dave's design and see if it meets your