Murlix
Member level 2
12 ghz microstrip design
hi, I am beginner to LNA design. I am doing 12Ghz LNA design using microstrip .I am using ATF36077 HEMT FET (avago) as the transistor and RO3010 pcb(Er=10.2). I am using ADS2005A for design and simulation.
I have attached the schematic of my design and ATF36077 datasheet for your viewing.I used Zin=15.547+j9.6410 and Zload =17.75+j4.99 for my design. I set the MLOC TL9 and MLIN TL11 as the input matching network while MLOC TL10 and MLIN TL12 as the output matching network( in the schematic).TL3 and TL2 is just the connecting microstrip to the transistor).My goals for the design is gain>10dB and noise figure<1dB
My problem is that :
1)I am not sure whether my transistor biasing is done correctly?Also i dont know how to optimize the biasing?
2)Is decoupling capacitor required for dc voltage sources and if yes what values should i use?
3)I converted the RF choke inductor into microstrip using λ/4 length formula( the microstrip for this is TL8 and TL6 in the schematic while TL7 and TL5 is just the connecting microstrip). I am not sure whether this method is correct?
i have read the application notes from avago website for LNA but still dont understand biasing.I hope you can guide me the way troubleshoot the design.Thanks in advance.
datasheet - h**p://
or h**p://www.datasheetcatalog.com/datasheets_pdf/A/T/F/3/ATF36077.shtml
hi, I am beginner to LNA design. I am doing 12Ghz LNA design using microstrip .I am using ATF36077 HEMT FET (avago) as the transistor and RO3010 pcb(Er=10.2). I am using ADS2005A for design and simulation.
I have attached the schematic of my design and ATF36077 datasheet for your viewing.I used Zin=15.547+j9.6410 and Zload =17.75+j4.99 for my design. I set the MLOC TL9 and MLIN TL11 as the input matching network while MLOC TL10 and MLIN TL12 as the output matching network( in the schematic).TL3 and TL2 is just the connecting microstrip to the transistor).My goals for the design is gain>10dB and noise figure<1dB
My problem is that :
1)I am not sure whether my transistor biasing is done correctly?Also i dont know how to optimize the biasing?
2)Is decoupling capacitor required for dc voltage sources and if yes what values should i use?
3)I converted the RF choke inductor into microstrip using λ/4 length formula( the microstrip for this is TL8 and TL6 in the schematic while TL7 and TL5 is just the connecting microstrip). I am not sure whether this method is correct?
i have read the application notes from avago website for LNA but still dont understand biasing.I hope you can guide me the way troubleshoot the design.Thanks in advance.
datasheet - h**p://
or h**p://www.datasheetcatalog.com/datasheets_pdf/A/T/F/3/ATF36077.shtml