To enter ISP mode, CHPCON=0x87, CHPCON=0x59, CHPCON=......
Please check the data sheet and demo code by the silvio's post.
Here is a solution to access the Security Register (0xFFFF @ LDROM)
which the data sheet and demo code does not mention very clearly:
Your code run at LDROM when you'd like to update your code in APROM,
1. Erase APROM (
it will also reset the Security Register to 0xFF [no protect])
2. Program/Verify APROM
3. Lock both of APROM and LDROM:
Code:
protect=~(0x1|0x2|0x4) // reserved bits = 1, lock/movc/encrypt (depends on your desire)
SFRCN=0x61
SFRAH=0xFF
SFRAL=0xFF
SFRFD=0xFF & protect
Now, you could check it via any 51's programmer.
Anyway, I used the above to protect code via ISP for Winbond's W78E58/W78E516.
BTW, you could read the Security Register back even it was locked:
Code:
SFRCN=0x40
SFRAH=0xFF
SFRAL=0xFF
................ (read it via SFRFD after a wake-up from idle mode)
And the Security Register will be reset just to erase APROM,
it is not needed to erase LDROM if you do not update your code in LDROM.
Another words, to lock it when the code is running in LDROM,
it is also not needed to switch back to APROM.
So it is easy to implement, just like to program APROM....
I emulated Philips's ISP Intel HEX format, so I could use Philips's WinISP to update.
Enjoy coding!