[HELP] ncvhdl/ncverilog how to?

[billjoy]

ncvhdl

Question:
How to generate fsdb in ncvhdl/ncverilog(v5.4)?
pls give the detail commend (how to call novas/verdi pli?) under rethatlinux
enviroment?

tks in advance!

 

[wadaye]

ncverilog fsdb

Hi billjoy,

In this version NC, you can dunp the fsdb file directly. Just use the system call,

$fsdbDumpfile("filename");
$fsdbDumpvars;

 

[nand_gates]

ncvhdl version

To generate waveforms :
1. set LD_LIBRARY_PATH appropriately :
LD_LIBRARY_PATH=/tools/Novas/share/PLI/nc_xl/LINUX/nc_shared:$LD_LIBRARY_PATH
2. Add the following somewhere in an initial statement in a verilog file :
$fsdbDumpvars; // this will dump all the variables in the design.
3. Compile and run as usual (using ncverilog). A 'verilog.fsdb' file will be created which is the signal dump database for Debussy.

 

[billjoy]

nc vhdl fsdb

thanks to wadaye :
but my problem is in my IC, some IP is VHDL
some is verilog
I need add my module and integrated those IP
How to generate mix(vhdl+verilog) fsdb?
I see so run_script
use
ncsim .... input dunp.tcl
but I dont know TCL
Is there any document for reference??