balakrishna
Newbie level 4
Hi friends,
I am writing VHDL code for one application. In that application, Two 8-bit Registers and one 16-bit Counter will be there. The Counter is a DOWN counter.
The Register is loaded from external 8-bit Micro Processor(MP) and each Register is referenced with a separate address.
When ENABLE pulse is given to a counter, it is loaded(asynchronous) with the registers(8-bit + 8-bit) data at the same time and the counter decrements on rising edge of the clock.
Please anybody help me to write code for the above application.
I am writing VHDL code for one application. In that application, Two 8-bit Registers and one 16-bit Counter will be there. The Counter is a DOWN counter.
The Register is loaded from external 8-bit Micro Processor(MP) and each Register is referenced with a separate address.
When ENABLE pulse is given to a counter, it is loaded(asynchronous) with the registers(8-bit + 8-bit) data at the same time and the counter decrements on rising edge of the clock.
Please anybody help me to write code for the above application.