Help me with VHDL code for two 8-bit registers and 16-bit counter application

[balakrishna]

Hi friends,

I am wtiting VHDL code for one application. In that application, Two 8-bit Registers and one 16-bit Counter will be there. The Counter is a DOWN counter.
The Register is loaded from external 8-bit Micro Processor(MP) and each Register is referenced with a separate address.

When ENABLE pulse is given to a counter, it is loaded(asynchronous) with the registers(8-bit + 8-bit) data at the same time and the counter decrements on rising edge of the clock. The application is shown below.



---------------- ---------------
8-bit Data | | 8-bit | | ENABLE
---------------->| Register1 |-------------->| |<--------------
2-bit Address | (8-bit) | | |
---------------->| | | | CLK
----------------- | Counter |<--------------
| (16-bit) |
----------------- | |
8-bit data | | 8-bit | (Down |--------------->
----------------->| Register2 | -------------->| Counter) | Pulse indicating
2-bit address | (8-bit) | | | Count = 0
----------------->| | | |
------------------ -----------------


Please anybody help me to write code for the above application.