[SOLVED] Help me with 1 bit comparator

[jianhuachews]

[Solved] Help me with 1 bit comparator

Dear,

I want to design a 1-bit comparator using VHDL where agtb_in, aeqb_in, a and b produces bits G,E.

E =1 when aeqb_i =1 and (a=b) , else 0
G=1 when agtb_i =1 or (aeqb_i =1 and a =1 and b=0) , else 0

Could aone help me in finding a program for this design,
regards

 

[Alexium]

Will this help?

entity comparator is
port (aeqb_i, agtb_i, a, b : in  STD_LOGIC;
        E, G               : out STD_LOGIC
);
end;

architecture A of comparator is 
begin
   E <='1' when aeqb_i ='1' and a=b else '0';
   G <='1' when agtb_i ='1' or (aeqb_i = '1' and a = '1' and b = '0') else '0';
end architecture