Help me understand the Vid, VE and Vx in my circuit

[wjxcom]

I want to know why!!

Hi, all: look at this circuit please.

In this circuit, for Vid=Vin+ -Vin- and VE=Von, where Von is the minimum value that ensures the MOS FET is in saturate region. Whtn |Vid|<2VE, M1-M8 are all in active mode (saturation), and Vx, the voltage at source terminals of M2, M4, M6 and M8, becomes input common mode voltage.

I do not know whyWhtn |Vid|<2VE, M1-M8 are all in active mode (saturation), and Vx, the voltage at source terminals of M2, M4, M6 and M8, becomes input common mode voltage?

VE is the minimum voltage that can ensure the MOS transistors in the saturation range, suppose the VE of the PMOS and the NMOS is the same!!

help me, please!!

 

[Vamsi Mocherla]

I want to know why!!

Dear wjxcom,

Note that Vin+ or Vin- should be in the range of VDD-(2*VDS,sat(p)+|VTHp|) and (2* VDS,sat + |VTHn|).

I do not know what VE is? I am not seeing any VE on the curve.

Vx is obviously obtained by actually running a KVL across the current mirror pair. Since there is a short circuit between two nodes, Vx will add the opposite polarities of differential signals while capturing the common mode value

 

[wjxcom]

I want to know why!!

Hi, Vamsi Mocherla: VE is the minimum voltage that can ensure the MOS transistors in the saturation range. i.e. sat(p) or sat.

thanx!!!

 

[aryajur]

Re: I want to know why!!

Suppose Vin+ moves up by VE and Vin- moves down by VE then what happens is M4 and M6 have their Vgs=Vth i.e. at the verge of cutoff, if Vin+ goes anyhigher or Vin- goes any lower then they will go into cut off thus the condition |Vid|<2VE

 

[wjxcom]

I want to know why!!

Hi, aryajur:

thanx for your answer.

But I do not know why "Suppose Vin+ moves up by VE and Vin- moves down by VE then what happens is M4 and M6 have their Vgs=Vth ", can you explain it detailed? what happens for M2 and M8 when we Suppose Vin+ moves up by VE and Vin- moves down by VE?

 

[aryajur]

Re: I want to know why!!

When Vin+ moves up then the gates of M3 and M1 follow Vin since the current in them is fixed so their Vgs needs to be constant. So if Vin+ moves up by VE then gates of M1 and M3 move up by VE but since Vin- moved down by VE, Vx remains at the same potential. So that means the Vgs of M2 will increase be VE and the Vgs of M4 will decrease by VE. Thus M4's Vgs = Vgs(original) - VE
where VE = Vgs(orginal)-Vth

then Vgs(new of M4) = Vth thus it will be at the verge of cutoff. I hope this makes it more clear.

 

[wjxcom]

I want to know why!!

Hi, aryajur: thanx for your answer!!

but I do not understand: why Vx remains at the same potential when Vin+ and Vin- change?

and if |Vid|<2VE, are M1-M8 in saturation range?

 

[aryajur]

Re: I want to know why!!

Vx remains at the same potential since it will represent the common mode signal of Vin+ and Vin-, i.e. when Vin+ goes up it tries to take Vx up with it but when Vin- goes an equal down it tries to take Vx down by the same amount so Vx remains constant at the common mode level.
When |Vid|<2VE then since we prevent any transistor to go in cutoff and the circuit is designed initially that when the Vgs of M2 or M8 increases by VE its Vds decreases by VE and even by this the transistor remains in saturation so yes M1-M8 remain in saturation for that swing.

 

[wjxcom]

I want to know why!!

dear aryajur: I am sorry to disturb you again!! but I do not understand what you said about why When |Vid|<2VE M1-M8 are in saturation.

because |Vid|<2VE, can the Vgs of M2 or M8 can increase by VE? because if the Vgs of M2 or M8 can increase by VE, I think Vin+ or Vin- will increase by VE, this will make M2 and M8 ro M4 and M6 in cut off.

at the same, you said "when the Vgs of M2 or M8 increases by VE its Vds decreases by VE", so I think M2 or M8 will be in linear region, no saturaion region.

thanx you again!!!

Added after 40 minutes:

at the same time, why Vx should be (Vin+ +Vin-)/2?

 

[aryajur]

Re: I want to know why!!

well, I will try again. From the beginning, if Vin+ increases by VE and Vin- decreases by VE. Now the Vgs of M1, M3, M5 and M7 remains constant(because current thru them is fixed), so Gates of M1 and M3 move up by VE and the gates of M5 and M7 goes down by VE. Now Vgs of M2 and M8 tries to increase while that of M6 and M4 tries to decrease, so M4 and M2 try to increase Vx while M6 and M8 try to decrease Vx, in case the circuit is symmetric these 2 effects cancel off and Vx does not move, until the transistors remain in Saturation. Now since M4 and M6 have decreasing Vgs they can only decrease till their Vgs decreases upto Vth. i.e. it can decrease by VE. Any more decrease will put those in cut off and hence the given condition.
I don't know how else I can put it more clearly. Hope you understand it this time.

 

[wjxcom]

I want to know why!!

Hi, aryajur: I think your answer is very detailed and it is kind of you to answer my question.

I have already understand why Vx does not move from your answer, but in fact, the value of Vx is (Vin+ +Vin-)/2, I do not know why Vx is this value.

This circuit can be find in the paper "A Novel-Class AB Transconductor suitable for High Speed CMOS Operational Amplifier", writed by C. Sawigun and J. Mahattanakul.

 

[aryajur]

Re: I want to know why!!

Yes that would be the value of Vx that is why it is the common mode level and that is why it does not move.