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Tipically, contact/via measures are fixed. You must search contact conductancy value, inside its process parameters. You must distribute the current consumption among a given number of contacts, according with read conductancy per contact.
I high current application(or power MOS FET ). I aften let the MOS layout by finger type.and fill COs and VIAs in drain and source side. this can reduce the contact resistance .
The metal layer and uniform turn on is another important factor of high current MOS layout.
Don't forget to contact well the gate of your big mos! How do you plan to do that? Unit cell? 1 finger, 2 fingers? How many metal layers do you have? Connection to the pad to be think before starting your layout? Guardring?
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