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Help me resolve a counter design question

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cutesue

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hi ppl!
can u plz tell me how to solve this question..

Please design a counter that counts the number of times the
number “5” appears in an 4-bit input stream. The I/O are as follows:
NumberIn : 4-bits wide (input)
Start: Reset counter and overflow flag to zero while start is high (input)
Count: 8-bit unsigned count (of the number of “5”s that have occurred since start went
low (output)
Overflow: Goes high if count overflows (count is unsigned, so you only need to monitor
the adder carry out) and stays high until start is re-asserted.

Design this functional unit down to the logic (gate) level. An adder is required – you can represent
this as a “+” unit – no need to design its detail. There is no need to optimize the design.
The only flip-flop you can use is a D flip-flop, and its clock input can only be connected
to “clock”. You can NOT use a flip-flop with preset or clear. Muxes and adders can be
drawn as single blocks, you do not have to design their internal structure.
 

jpanhalt

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Re: design of counters..

Can you XOR it with 5 and count the number of zero outputs?

John
 

cutesue

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Re: design of counters..

thanks for your reply.. yes i can do that but then, what do the values start and overflow signify? i dont understand what they mean and where to use them.
 

shanmugaveld

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Re: design of counters..

Use of start signal is to give an indication to your design to ready for the operation.
Overflow may act as interrupt or time out signal to the user.

Instead of 8 bit counter use 9 bit counter and make '9' bit as overflow element.
Use a mux to send either the counter value or zero with start as select signal.
Dont increment the counter when '9' bit is high.
 

cutesue

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Re: design of counters..

I am told to use 2 muxes, one gate and one 8bit adder, and D flip flops for input and output.How do i do it..
 

shanmugaveld

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Re: design of counters..

while HDL coding extra bit used to avoid overflow.
you can use 8 bit counter and with "carry" in your block.

use carry as a select line to decide, whether to increment or not.
input '1' tie to zero and input '0' tie to the xor gate(comparator for 4 bit stream and 5)

use start signal to reset the counter value, when it is high else use addrer for increment wrt other mux(which uses carry as select line).
 
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