triquent
Full Member level 3
power ios
My course project spec isthe tool we are using is the silicon ensemble)
1) 2 pairs of VDD VSS pads on four side, spread out on each side
2) Additional power/ground pads sandwich clock pad in IO(only one clock pin in this design)
3) Power connection is completed including IO rings
how to arrange the power pads is better for higher speed?
1) Where should I arrange the VDD&VSS pads on each side? center or corner?
2)for the VDD/VSS pads to sandwich the clock pad, should i use two VDD or two VSS or one VSS&one VDD? which one is better?
3) how to determine where should I place the clock pins and other IO pins? make them as close as to their corresponding internal cell?
4) in order to complete the power connection, I should add the corner cell. how about the filler cell? if yes, at which step to add? also should I use command CONNECT RING? i didn't use it at the class.
My course project spec isthe tool we are using is the silicon ensemble)
1) 2 pairs of VDD VSS pads on four side, spread out on each side
2) Additional power/ground pads sandwich clock pad in IO(only one clock pin in this design)
3) Power connection is completed including IO rings
how to arrange the power pads is better for higher speed?
1) Where should I arrange the VDD&VSS pads on each side? center or corner?
2)for the VDD/VSS pads to sandwich the clock pad, should i use two VDD or two VSS or one VSS&one VDD? which one is better?
3) how to determine where should I place the clock pins and other IO pins? make them as close as to their corresponding internal cell?
4) in order to complete the power connection, I should add the corner cell. how about the filler cell? if yes, at which step to add? also should I use command CONNECT RING? i didn't use it at the class.