Help me implement serial-in / parallel-out fir filter

[Rfboy]

Fir filter !!!!!!

Hy guys,

I need your help about this problem :

1) I use a FIR compiler of Altera
2) I want to implemet a serial-in / parallel-out fir filter ( raised cosine type )
3) I want to put a 10 bit dac directly connected to the bus of fir filter

Now my questions are :

1) Is the output bus of filter in two complements format ?
2) If yes, how can it's possible to cennect this bus in to a dac having unsigned digital bus input ???

3)Is it possible to implement a unsigned filter ????


Thak you

 

[telga]

Re: Fir filter !!!!!!

Hello,

Can you describe more your system (with a small draft for example) ?
Can you give the serial input frequency ?
What is the working frequency for your FPGA ?

Telga

 

[echo47]

Fir filter !!!!!!

1. Probably yes.
2. Simply invert the most significant bit. Then your unsigned DAC will be happy.
3. I suppose so, but do #2 instead.

 

[andy1]

Re: Fir filter !!!!!!

Is this an FPGa implementation?