Help me for VGA signal control by FPGA

[hoangthanhtung]

I have a FPGA board and a CPLD board of XESS company. I want to use VGA interface in this cards so I do not any documant about it. I also search in XESS site but document in this site is damaged.

Anyone can help me. Please, upload some examples and full documents for them.

Thank you so much for your helping

 

[eltonjohn]

still there at :

**broken link removed**

 

[hoangthanhtung]

I have test some program in this site but they are uncorrect. Could anyone post some program which is tested to site.
Thank

 

[davorin]

Would you please define "uncorrect"???
Assuming you know what "uncorrect" is you could have correct them? (o;

Generating VGA signals is one of the simplest tasks in FPGA. Only a matter of few counters and the right clock frequency (o;

 

[hoangthanhtung]

I think that the schematic in this examples has a problems. I also fix it all and compiler it so there is not any signal in monitor. I do not know the reason.
Could anyone upload or send other code about this problem to me? Thank so much

 

[davorin]

I can´t believe it would be so hard to find VGA resources for FPGA...
First hit from google searching for "vga verilo":

**broken link removed**

And there are shitloads of other examples as well...don´t be too lazy (o;

 

[hoangthanhtung]

Thank you so much, I have tested it complete. I have a error with hex file which is loaded into SRAM so that there is anything in monitor