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Help me declare the array of a SRAM memory using Verilog

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stephina

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I need to design a 16MB SRAM Memory in my project..can a nyone help me with the way I need to declare the array for memory using verilog.
What will be the array size so as to get a 16MB memory, what will be the number of address bits required for that..
I am not able to understand the correspondance of address to its related data.. I mean how will address get linked with the data.
I need to do this all with verilog code

Thanks in advance
 

vaisram

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Re: Design a SRAM Memory

Number of data words to be stored in the memory = Memory size = 2 ^ (Number of address bits).

There is no correspondence between the data and address as such. The address width only defines the amount of data that can be stored.

Hope you can do rest of the calculation. :)
 
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