belal elkady
Newbie level 6
i made this code ( count down stopwatch ) and i wanna to connect input ( sec, min ) to their signals ( r_next , r_next2) ... but i couldn't ... can someone give some suggestions ??
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity stop_watch is
Port ( clk,res : in STD_LOGIC;
sec,min:in STD_LOGIC_VECTOR (5 downto 0);
start_stop:in std_logic;
sec_out ,min_out: out STD_LOGIC_VECTOR (5 downto 0);
finish
ut std_logic);
end stop_watch;
architecture Behavioral of stop_watch is
signal r_reg:unsigned(5 downto 0);
signal r_next:unsigned(5 downto 0);
signal r_reg2:unsigned(5 downto 0);
signal r_next2:unsigned(5 downto 0);
signal mux: std_logic;
begin
process(clk,res)
begin
if (res='1')then r_reg<="000000";
elsif (clk'event and clk ='1') then r_reg<=r_next;
end if;
end process;
r_next<=r_reg when start_stop='1' else
"111100" when (r_reg="000000") else
r_reg-1;
sec_out<=STD_LOGIC_VECTOR(r_reg);
mux<='1' when r_reg="0000000"
else '0';
process (clk,mux)
begin
if mux='1' then
if (clk'event and clk='1') then
r_reg2<=r_next2;
end if ;
end if ;
end process;
r_next2<=r_reg2 when start_stop='1' else
"111100" when (r_reg2="000000") else
r_reg2 -1;
min_out<=STD_LOGIC_VECTOR (r_reg2);
finish<='1' when ( r_reg="000000" and r_reg2="000000") else
'0' ;
end Behavioral;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity stop_watch is
Port ( clk,res : in STD_LOGIC;
sec,min:in STD_LOGIC_VECTOR (5 downto 0);
start_stop:in std_logic;
sec_out ,min_out: out STD_LOGIC_VECTOR (5 downto 0);
finish
ut std_logic);end stop_watch;
architecture Behavioral of stop_watch is
signal r_reg:unsigned(5 downto 0);
signal r_next:unsigned(5 downto 0);
signal r_reg2:unsigned(5 downto 0);
signal r_next2:unsigned(5 downto 0);
signal mux: std_logic;
begin
process(clk,res)
begin
if (res='1')then r_reg<="000000";
elsif (clk'event and clk ='1') then r_reg<=r_next;
end if;
end process;
r_next<=r_reg when start_stop='1' else
"111100" when (r_reg="000000") else
r_reg-1;
sec_out<=STD_LOGIC_VECTOR(r_reg);
mux<='1' when r_reg="0000000"
else '0';
process (clk,mux)
begin
if mux='1' then
if (clk'event and clk='1') then
r_reg2<=r_next2;
end if ;
end if ;
end process;
r_next2<=r_reg2 when start_stop='1' else
"111100" when (r_reg2="000000") else
r_reg2 -1;
min_out<=STD_LOGIC_VECTOR (r_reg2);
finish<='1' when ( r_reg="000000" and r_reg2="000000") else
'0' ;
end Behavioral;
