HELP: Interview Questions

[hauntedhunter]

Hi,

In a recent interview I was asked the following questions.Can ayone please help me to answer them :

q.1) Why we must have substarte and well contacts?What will happen if we keep them floating?

q.2) What will happen if by mistake we connect p-substrate to VDD instead of VSS(GNND)?

q.3) Why PMOS is good for logic '1' and not logic '0'?

q.4)Whats is isolated substarte?

Please help.I have another interview on Friday.[/b]

 

[khouly]

q.1) Why we must have substarte and well contacts?What will happen if we keep them floating?
the substare and the well mainly make PN junction so the contact used to always make this junction revers biased to isolate the components on the well

q.2) What will happen if by mistake we connect p-substrate to VDD instead of VSS(GNND)?

then the all junctions in the sub will not be reversed "forward bias" , so the devices will not work

q.3) Why PMOS is good for logic '1' and not logic '0'?
coz the PMOS will pass a stronge one stronge one mean that it will not pass high - Vt

khouly

 

[hauntedhunter]

I got your point that we need to reverse bias the junction for the device to work.But why?

 

[khouly]

if we are talking about a NMOS device , the substarte is P type , and source and drain are N+ and u wee need that the current to follow in the channel not in the substarte so the PN junction between the substrate and the source and drain should be reversed

khouly

 

[vijay.kumarreddy]

.1) Why we must have substarte and well contacts?What will happen if we keep them floating?

If u keep the well/substrate ,u will get the latch up issue.The main reason to provide the contacts is to reduce the well/substrate resistance to bypass the minority carriers.

q.2) What will happen if by mistake we connect p-substrate to VDD instead of VSS(GNND)?

Again u will get the latchup issue and large power dissipation.

q.3) Why PMOS is good for logic '1' and not logic '0'?

q.4)Whats is isolated substarte?

substrate connected to other than gnd potential,but finally u will be having a common 0 potential at the baord leve or at the top level.

 

[madanmmohan]

q.4)Whats is isolated substarte?

substrate connected to other than gnd potential,but finally u will be having a common 0 potential at the baord leve or at the top level.[/quote]



Why we will do this ? can you please explain it in detail

 

[varma_cs012]

q.1) Why we must have substarte and well contacts?What will happen if we keep them floating?

We need substrate contacts for prevention of Latch up. If you want to know more about latch up you can search the previous posts. Then you will get to know why we need substrate contacts in detail.

q.2) What will happen if by mistake we connect p-substrate to VDD instead of VSS(GNND)?

It will cause to increase the lekage current. How means, when you are giving substarte to VDD rather than VSS you are forming a diode b/w Source and Substrate. And that will be forward biased. In this way lekage current will be increased.

q.3) Why PMOS is good for logic '1' and not logic '0'?

Please look into the below topic. it may help.


q.4)Whats is isolated substarte?

As per it's name it self, substrate is isolated from total substrate. This thing we will generally use to avoid the noise issue. Correct me if I am wrong anywhere. Thank You.