help in xilinx system generator

[analog_member]

i would like to know if we can build a feedback system using the xilinx system generator blocks. some blocks are the xilinx blocks some are the analog filter and vco of the simulink blocks. Its not working for as the input the vco is always at zero , hence the vco output frequency does not change at all.

hoping for some help soon.

 

[mano1988]

Am not clear of ur problem (not working???).
But to use Xilinx blocks for a Xilinx FPGA (synthesise the design), the whole system should have only system generator blocks and not any simulink blocks(within Gateway In and Gateway Out). But for simulation purpose it is fine to have simulink blocks along with the sysGen blocks (the tool would give a warning).
If the input to the system is through a SysGen block, check for the data type and optmization parameters in the Gateway In/Out and SysGen blocks.

 

[analog_member]

thank u mano1998. I do know we should only put xilinx blocks within gatewayin and gateway out. I did the same, i have used xilinx adders and multipiers to build a filter ( keeping them inside the gateway in and gateway out ) and connected them to simulink analog filter and continuous vco block. The problem is that the input to the analog filter and output are zero, hence the vco's output is only its centre frequency.

I want to know if we can build a feedback system using system generator, as i have to feedback the vco's output to the input of the system and pass it through the filter built using the xilinx blocks ( obviously after interconnecting it through a Gateway In)

 

[mano1988]

The SysGen blocks are represents most of the simulink blocks. So, If have a design (any), try it out first with the simulink blocks (whole algorithm) alone. If you are able to achieve your functionality with it, then move to SysGen blocks (replace the simulink blocks with corresponding SysGen blocks) where you would have to check the clock frequency, data width, critical path...
And ofcourse you can built a feedback system with system generator.

 

[analog_member]

ya i did check its functionality first with only the simulink blocks , it worked fine. I'm buidling a mixed signal feedback system, hence the digital blocks i have replaced with the system generator blocks with proper gatewayin and gateway out blocks. But i cant replace the analog blocks for example the voltage controlled oscillator (VCO) by the sys gen blocks , hence i have used simulink blocks for it. When i do this I'm not getting the required frequency.