May 23, 2011 #1 H himajam Newbie level 3 Joined May 19, 2011 Messages 3 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,303 Hi, I am newbee to VHDL. can anyone help me in implementing this multiplication using VHDL? X = 0.2 * 0.05 Else any idea like how to proceeed? Thanks in advance...
Hi, I am newbee to VHDL. can anyone help me in implementing this multiplication using VHDL? X = 0.2 * 0.05 Else any idea like how to proceeed? Thanks in advance...
May 23, 2011 #2 S shyam4908 Newbie level 6 Joined Dec 1, 2009 Messages 14 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,402 Library ieee; use ieee.std_logic_1164.all use ieee.std_logic_arith.all; entity mul is ( a : in std_logic_vector(15 downto 0); b : in std_logic_vector(15 downto 0); prd : out std_logic_vector(31 downto 0) ); architecture behav of mul is begin prd <= a * b; end -------------------- Use the above code
Library ieee; use ieee.std_logic_1164.all use ieee.std_logic_arith.all; entity mul is ( a : in std_logic_vector(15 downto 0); b : in std_logic_vector(15 downto 0); prd : out std_logic_vector(31 downto 0) ); architecture behav of mul is begin prd <= a * b; end -------------------- Use the above code
May 23, 2011 #3 FvM Super Moderator Staff member Joined Jan 22, 2008 Messages 52,419 Helped 14,749 Reputation 29,780 Reaction score 14,100 Trophy points 1,393 Location Bochum, Germany Activity points 298,094 Use the above code Click to expand... You should mention, that a fixed point number representation will be needed. The question isn't quite clear, because it misses a number range and resolution specification.
Use the above code Click to expand... You should mention, that a fixed point number representation will be needed. The question isn't quite clear, because it misses a number range and resolution specification.
May 23, 2011 #4 T TrickyDicky Advanced Member level 7 Joined Jun 7, 2010 Messages 7,110 Helped 2,081 Reputation 4,181 Reaction score 2,048 Trophy points 1,393 Activity points 39,769 shyam4908 said: Use the above code Click to expand... The above code wont work, because you havent included the correct libraries to multiply std_logic_vectors.
shyam4908 said: Use the above code Click to expand... The above code wont work, because you havent included the correct libraries to multiply std_logic_vectors.
May 23, 2011 #5 S shyam4908 Newbie level 6 Joined Dec 1, 2009 Messages 14 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,402 use ieee.std_logic_unsigned.all. If any other library..please let me know
May 23, 2011 #6 T TrickyDicky Advanced Member level 7 Joined Jun 7, 2010 Messages 7,110 Helped 2,081 Reputation 4,181 Reaction score 2,048 Trophy points 1,393 Activity points 39,769 The fixed point packages would be much more useful for fixed point.