help dsss reciever synchronistion

[rave1786]

i am doing vhdl implementation of dsss as my btech project
my target board is spartan 3e
i have been able to design pn sequence generator,bpsk modulator and demodulator.
the output of bpsk demoduator has a slight lag wrt to input of bpsk modulator.
my pn sequence is 16 bit and occupies exactly one message bit.
after bpsk demodulation i have to despread the signal and here comes the problem
how to multiply the scrambled signal with pn sequence.
i referred some theory and came across terms signal acquisition and tracking.
can any one tell me how to implement them in vhdl.
i am in dire need as i have submit my report in ten days.
thank you :|

 

[balu3205]

can u pl tell me the material u used for implementing dsss in vhdl..?

 

[rubana]

iam doing ds cdma transmitter project based on fpga & vhdl can u help me can u provide me code for pn code generator & bpsk modulator
my email id is rmirza1@rediffmail.com