Help..........Design with multi-RAM under SMIC 130nm process

[jeacky]

hi,friends

at prsent, we have a ASIC project using SMIC 130nm process, the ciucuit have many RAM (NO.200 capacity.4K), someone can give some advice in FE and BE design considerations? thanks!

we carry out 130nm ASIC design firstly. Does the 130nm design and 180nm design have great difference in IC design? what is the difference between them in design procedure?



thanks alot!

 

[papertiger]

build 5-10 sub-blocks.
It will make the design much easier

 

[shilong_xu]

Re: Help..........Design with multi-RAM under SMIC 130nm pro

thanks papertiger!

but at present, our algorithms decide the whole RAM blocks, how to build 5-10 blocks?

how to layout to this type of ciuciut? any guidance?

 

[jeacky]

Re: Help..........Design with multi-RAM under SMIC 130nm pro

does anyone give some advices?

 

[pravinkhade]

is there any tool for for resonence tunnaling diode based desegn