Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Help : Design with Memory Cells

Status
Not open for further replies.

eda_wiz

Advanced Member level 2
Joined
Nov 7, 2001
Messages
653
Helped
58
Reputation
116
Reaction score
29
Trophy points
1,308
Activity points
6,195
Design with Memory Cells
In many cases, logic implemented with memory cells can offer significant size advantages over a standard–cell implementation..

This is a sentence from TSMC design asic design guide.

I dont know what is design with memory cells ? can anyone tell me.
how can a logic that is implemented using std cells can be implemented with memory compiled cells. ? :?

Also there is a tool called memory compiler .. Is it for this ?

thanks
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top