Help- Design of charge pump using low Vt NMOS

[sbhalerao]

low vt high vt

Hi to all,
I am presently a part of research group. We are analysying various circuits to be used in a Wireless Sensor node..
We need to design a charge pump (Dickson Charge pump) that takes a input of ~0.2 V or ~ 0.3 V and converts into `2 V at the output.. We are using PSPICE to simulate the circuit.. (We may also use TSpice- if its useis warranted)..
The main problem is - we need a low Vt NMOS transistor model.. In fact, in some IEEE research papers, people have explored designs using zero Vt NMOS.. However, I cannot understand how we could have a zero Vt NMOs .. We a model is available for zero Vt or very low Vt NMOS, we would be helped to a great degree.
I tried searching at various places on the web,but did not find any such models..
1) Could anyone suggest what I should do?
2) Could anyone post any low Vt NMOS model ??

Thanking you all in advance,
Shantanu Bhalerao,
ECE, NIT Nagpur

 

[slchen]

low vt nmos

If using the zero-vt NMOS, the reverse leakage current becomes larger.
However, your input voltage is only 0.2 V.
What is voltage swing of the clock signal ?

slchen

 

[sbhalerao]

spice charge pump

Thank you slchen for your reply.
The voltage swing of the clock signal is 0.5 V... I actually did not anticipate any problem regarding large reverse leakage current...
And how do I use a zero - Vt NMOS ??? How is the zero Vt possible??
What model/parameters do I use in SPICE simulations??

 

[pfd001]

zero vt dickson charge pump

Zero Vt is possible. u can modify the spice model by yourself. Vt is controllable. negative vt is also possible., which is the depletion transistor

 

[sbhalerao]

zero vt nmos

Zero Vt is possible. u can modify the spice model by yourself. Vt is controllable. negative vt is also possible., which is the depletion transistor

So you mean that I should just put Vto = 0 V in the BSIM model to be used in SPICE ??
I also was thinking on similar lines, but I did not know if changing this parameter in the BSIM model is the correct thing to do.. I am using BSIM 3.3 model for NMOS 0.18 um technology..
Thanks for all the help..
Shantanu

 

[pfd001]

low vt and high vt charge pump

It is just for simulation. u can make sure ur schematic is correct with it. When u design it, u can get the spice model from the foundry. Normally, the EEPROM process has low vt transistors.

 

[sbhalerao]

zero vt charge pump

I just wanted to get this verified from all people here ---

For zero- Vt NMOS , I just need to put Vto= 0 in the SPICE model ??
I am not using any biasing and Vto = Threshold voltage at zero bias ...

 

[tekno1]

charge pump pcspice design

@sbhalerao,

Before designing anything, it is better to check whether a suitable low Vt device available in any foundry that you can built your circuit. If a proper process is not available than playing around with Vt of transistors is fine to satisfy ones academic quriosity, but not meaningfull for any practical results.

 

[ocarnu]

vt nmos

AFAIK all fabs offer zero Vt and is free.... is not an added mask. It is very used for caps because they are more linear. If you make a cap wioth normal device the value of the cap varies wildly around the Vt.

 

[pfd001]

It is misunderstandiing. zero vt deviceis not available for standard cmos process. can you explain how the cap with zero vt transitor? is it a gate-source cap?