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help about Xilinx platform cable USB

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ulaska

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xilinx parallel cable iv power supply usb

this is my first programming CPLD.
i will use Xilinx XC9572XL-10. it is mounted on the PCB.

TDI TDO TMS TCK is okay.
but where should i connect the "Vref" wire?
what is Vref, is it target PCB's power ?

if Vref is target PCB's power voltage, does it mean we must download the CPLD, when the PCB's power is ON?

please help me.
 

ulaska

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xilinx platform cable troubleshoot

is there anybody to help?
 

M!k

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ulaska said:
if Vref is target PCB's power voltage, does it mean we must download the CPLD, when the PCB's power is ON?
that's correct. There is, at least for Xilinx Parallel Cable IV (PC IV), no power supply from the cable to your target board. So it has to be powered separately.

Concerning Vref for PC IV:
Automatic I/O Voltage Sensing
Although JTAG configuration pins have typically operated at
3.3V or 5.0V, new devices support voltages as low as 1.5V.
Voltage levels for Slave-Serial configuration pins follow the
respective I/O bank voltage, which can be in the range from
1.5V to 5.0V. Consequently, the PC IV output buffers must
be capable of driving aat the voltage level expected by the
receiving devices. The Vref pin on the target device is used
to bias the PC IV output buffers.
So connect Vref to the supply of your target board.


Mik
 

    ulaska

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