help about SMPS compenstion network.

[VVV]

The primary ground can be left floating.
The secondary ground does not have to be tied to chassis, unless this is a requirement. But you can add capacitance between the secondary ground and chassis.
There is also in general a Y-capacitor between the input GND and output GND.

I think at this point I am most concerned about that heatsink that you say is connected to chassis. What is on that heatsink?

Here is an appnote that may give you some idea. https://www.onsemi.com/pub/Collateral/AND8032-D.PDF

 

[roofingboom]

a 1500v mosfet is on the heatsink!

another quick question. is a 100V schokty a high V rating for a 12 volt output?
otuput current is rated at 3 so i am using a 5 amp part but jsut wondering if a 100V schotty is good enough V rating?

i talk to another engineer and he agrreed leaving primary GND floating.

is there some where were there is a lot of SMPS schematics because maybe from there i could figure out fround issues and EMI ideas. One engineer keeps saying that i should make room for a turn of snubber. i already have the overvotlage snuber.

i am gong to make some inmages of the DS on the mosfet in couple days and i will post. I need to fine the root of this EMI issue.

 

[VVV]

OK, that MOSFET may be the cause of the problems. Can you connect that heatsink to the promary ground (isolating the MOSFET, of course)?
That heatsink should not be electrically connected to the chassis, although thermally it can be in contact with the chassis. This is the first thing that comes to mind.

The Schottky rating is based on the maximum reverse working voltage. That depends on your turns ratio and output voltage. Of course, the turns ratio depends on the input voltage range. So you need to check that. But for a 12 or 24V output, you almost certainly need 100V diodes.

Here is a website about smps. I don't know if they have schematics. **broken link removed**

 

[som_raparty]

hi
i am using the ucc28c45 ic in my flyback design
it is a 20w design with i/p of 19-32v and have five different o/p
if you are still not clear with your prob and any thing i can help can mail me

bye
som

 

[roofingboom]

ok question , still wokring on my flyback. how to you quantize how clean the output is? i look at output unloaded and it has about 40mV p-p ripple. but if i load it up to 2A then the ripple is like 400mV and the output starts to have a lot of HF noise. what do i do? i already have a LC filter after the output. is there anything else i can do?

on another note, when the power supply is unloaded it outputs 12.16V, 1A load it outputs 12.16, 2A load it outputs 12.11 and 3A load it outputs 12.05. Is this good regulation?

any help or insight would be grealty apperciated.
thanks

 

[VVV]

As I am sure you know, flybacks are notorious for the high secondary currents. The only device that takes care of those spikes is the output capacitor. Howevr, since this capacitor is usually an electrolytic cap, it has ESR (equivalent series resistance). Basically that means your cap is really a cap in series with a resistance. The voltage ripple will be mostly dictated by that ESR:
Vripple=ESR*Isecpp

It should be clear that in order to reduce the voltage spikes at the output you need lower ESR caps. If that is difficult or impossible, then you need to parallel several caps. Their ESR will appear in parallel and hence reduced.

For your 4A supply, assuming you are running in discontinuous mode, the peak currents could be 8A or more. Since the peaks are 0.4V, it follows that the ESR appears to be 0.4V/8A=0.05 ohms. Normally, caps specifically designed for SMPS should have lower ESR than that, but not much lower. You can expect about 0.03 ohms. That is the maximum value at room temperature. Since the ESR increases at lower temperatures, make sure you have enough margin to meet the ripple spec at the minimum specified operating temperature. Typically, the ESR is 2-3 times greater at -10C and 3-5 times greater at -40C.

Normal P/S requirements are 1% ripple and noise. Your 400mVpp is therefore somewhat too high. The LC filter helps. But first of all, make sure you are measuring the noise correctly. Normally this is done with the scope probe ground lead removed and just a piece of wire wrapped around the probe tip ground sleeve, no longer than about 0.2" (5mm). The probe tip touches the output and this makeshift ground lead touches the ground right at the output capacitor. Unless you measure this way, you will always get confused about noise.

Also, test that the scope does not see any common mode noise. To do this, just short the probe tip to the ground lead and together to the P/S ground. Any noise you see now is just common mode noise. To remove it from the scope, use a ferrite ring and feed the scope probe through it several times (like you are winding a toroidal choke). That should help reduce the common mode noise to a great extent.

As for the regulation of your supply, it is less than 1%. Normal P/S requirements call for 1%, so you are about making it, although you do not have much margin. If this is a single-output supply it should be bettter than that, although I do not know what error amplifier you are using.
Anyway, when you measure the load regulation, any trace resistance can mislead you, so make sure you measure exactly across the output cap. By the way, the LC filter is ususally not in the regulation loop, so it will degrade the load regulation, since it has resistance, which is simply in series with the output.

To check if the poor regulation is due to the error amplifier or to trace resistance, make sure you measure the output voltage right at the junction points of the output voltage divider (that goes to the error amp). If the regulation appears better at those points then you know the problem is with trace resistance so you can try and lower it. If the regulation is still rather poor you need to see why the DC gain of the error amp is too low.

 

[roofingboom]

as you know i have been trying to pass emi for a while. it seems all the noise is coming from my output. if we wrap the output wires twice around an ferrite then we pass radiated emi. if we dont wrap the output with ferite then we fail by 20dB. i was looking at the output with real short leads and i am seeing a 50mV (100mV peak to peak) notches in the out. I am looking at it AC coupled so i can see only thing HF noise. I am measuring right at the output cap. Should i add some cermaic caps to remedy this? Is my control bad? Whats causing the spikes? Can we reduce spike level. What is typical spike level. How can i reduce this so i can pass emi. are the output spikes caused mainly by the ESR of the caps?

On side note after the 4 output caps i have an LC filter and a ceremic cap to GND.
thanks for all your help.

another side note: i am properly snubbing the spike on the mosfet now. The spike is greatly reduced so i know that is not the problem.

 

[VVV]

Ceramic caps at the outpu can help.
The spikes can be the result of high ESR/ESL in the output caps. I hope you are usind special power supply caps. An LC filter is usually very effective at removing the spikes. If you say that a ferrite core helps, then use one. It sounds to me like a common mode choke is necessary at the output. Go ahead and use one.